Analogue components plus ARM MCU cores to meet embedded challenges
The difference between this and traditional analogue integration is the high level of performance now being offered and the optimisations made to solve specific system level problems. While every market will have their own order ranking of these areas to improve, satisfying multiple factors simultaneously is highly desirable and can come from the integration of numerous discrete components. Logically, combining parts could solve many of these embedded system goals, but simply putting several discreet components and a processor in one package is not the answer; the solution is far more complex, requiring smart integration.
Smart integration of A and D
Smart integration of high performance analogue components (amplifiers, ADCs, DACs, voltage references, temperature sensors, wireless transceivers etc.) and 32 bit processor cores from ARM with the right digital peripherals can address goals that discrete solutions cannot. In order to create the optimum analogue microcontroller solution, a strong knowledge of the overall system along with the availability of the right intellectual property (IP), and expertise in that intellectual property, is required. Chip designers and system engineers specifying the features of these integrated devices must have an exceptional understanding of the end application requirements. This domain knowledge is critical and includes a solid understanding of board level requirements such as form factor, temperature ranges, manufacturing, power consumption, cost, and complementary components in the signal chain.
Availability of the right IP provides a strong starting point for meeting system level goals. This starting point is needed to keep the development period of the analogue microcontroller short. Increasingly, the acquisition/creation and implementation of the IP itself, appropriate for the application, needs to be facilitated by the semiconductor manufacturer. This IP then needs to be modified to meet two requirements, in particular. The first is to maximise system level benefits by optimising performance and operation based on the needs of the primary target application. The next is to optimise the IP to work very well and very easily with the other complementary IP blocks in the analogue microcontroller.
And finally, there needs to be the opportunity at a business level for collaboration, combining the expertise and knowledge of the system manufacturer and semiconductor manufacturer resulting in an optimised, unique design.
Analogue MCU applications
There are many applications that can benefit from a device that integrates high performance analogue with ARM microcontrollers including temperature sensing, pressure sensing, gas detection, solar inverters, motor control, health care vital signs monitoring, automotive monitoring systems, and gas/water/electric meters. This article will look at two applications areas where integration of optimised high performance analogue and ARM microcontroller cores leads to significant benefits in cost, power, size, and performance:
1) Inverters for solar photovoltaic systems (PV) with goals of increased efficiency, bill of material (BOM) cost reduction, and integration of intelligence to support interfacing to the smart grid.
2) Motor Control, with the goals of improved efficiency for environmental benefits and cost reduction.
Note that while these smartly integrated mixed signal devices are optimised for particular end-applications, they can also work well for numerous adjacent applications having similar functional requirements to the primary target application.
next; solar inverters…
Solar photovoltaic inverters: cost reduction, and the smart grid
While solar PV electricity generating systems have seen greater than 50% annualised growth over the past 5 years, they still only account for a very small percentage of overall electricity generation worldwide. Although in some regions solar PV generated electricity has reached cost parity with fossil fuel generated electricity, in most it has not and generally this parity is dependent on government subsidies.
To better compete against traditional energy sources such as natural gas, coal, and oil, cost reductions of solar PV generated electricity is best achieved by both increases in efficiency and reduction in system BOM costs. As cost/efficiency of the panels themselves is trending down, new technologies also promise advances for solar PV inverters – the interface between the power generated by a solar panel and the grid. These new technologies include NPC topologies 3 level/ 5 level / multilevel, high frequency switching topologies using fast power transistors based on silicon carbide (SiC) and gallium nitride (GaN) materials.
Figure 1 Block diagram of two stage solar PV inverter system; area in red shows blocks targeted for smart integration.
Figure 1 shows a two stage solar PV inverter system. Power from the panels, essentially a DC source, is converted to AC for the grid. The first stage is a DC to DC conversion that raises the voltage level so it is compatible with the peak voltage on the grid. The second stage is a DC to AC conversion. The area in red shows the low voltage circuit control components that, when integrated into a single analogue microcontroller chip, give benefits at a system level. Costs are saved by integration into analogue microcontrollers and by new high speed switching topologies. The new topologies offer higher efficiency, lowering costs per kW of installation. There are also costs to be saved with these topologies given that smaller inductors can be used. This saves BOM costs and also allows for reduction in the size of the inverter.
High speed successive approximation register (SAR) ADCs are a good fit for this application as they provide the right level of accuracy (13 ENOB), fast conversion speed to support higher frequency control loops, the ability to support muxing of multiple input channels and low latency (< 1 µsec ). This system has 2 ADCs for simultaneous sampling of current and voltage on the Grid. A large number of input channels to the ADC is needed in order to monitor multiple points in the system – up to 24 analogue channels in some cases. Special muxing with buffering needs to be designed and interfaced with the ADCs in order to support this requirement.
For support of the multiple stages of conversion and the high speed control loops, a processor core with the right architectural performance and capability for high speed operation needs to be selected. In this case an ARM Cortex M4, designed for greater than 200 MHz operation over temperature, will meet the need.
The SINC filters, shown in Figure 1, are used in combination with isolation ADCs. This allows for measurement of AC current on the grid and DC current injection in order to avoid saturation of transformers. The traditional method is to use a Hall Effect current transducer but this is expensive compared to the isolation ADCs. This assumes that the SINC filters are integrated into the analogue microcontroller avoiding an additional chip in the BOM in the form of programmable logic. The isolation ADC-SINC3 filter combination also offers an added benefit of improved linearity compared to Hall Effect sensors leading to a reduction in harmonic distortion.
As the grid becomes smarter, solar PV inverters will need to have more intelligence to help deal with grid imbalance, on occasions when more power is available from multiple sources than is needed. For this reason, there is a focus on PV system intelligence with an eye towards grid integration, where each contributor to the grid must cooperate to stabilise the grid, rather than simply supplying power open-loop. Grid integration requires better measurement, control, and analysis of the quality of the energy fed to the grid. An harmonic analysis engine designed specifically to monitor the quality of power injected into the grid helps address this need. With the calculation of a number of variables including harmonic distortion, power, RMS voltage, RMS current, VAR, VA, and power factors the quality of power can be monitored. A dedicated engine to perform these calculations can give very high accuracy while off-loading the ARM M4 core from performing this task.
Solar inverters can benefit significantly at the system level with the use of analogue microcontrollers that are designed with this end application in mind. An understanding of the market trends and solid system knowledge can lead to a smartly integrated chip capable of supporting next generation topologies with low chip counts while also adding features to support interfacing to the smart grid.
next; motor control…
Motor Control: Improved Efficiency for a Better Environment and Lifetime Cost Savings
In addition to environmental concerns about how energy is generated, there are also concerns about how efficiently energy is used. Given that motors account for 40% of the world’s electricity usage, the question raised is how these systems can be made more “green”. The answer is to make them more efficient so less energy is used. Savings from broad use of more efficient motors is measured in large numbers: electricity savings in hundreds of billions of KWh and reduction in CO2 released into the atmosphere in millions of tons per year. The impact of more efficient motors is clearly very significant.
Specifically, there are a couple of key drivers for the use of more efficient motors. One impetus is government legislation driven by environmental concerns. The European Union has regulations in place and more to come in the future that mandates the use of more efficient motor systems. Another key driver is lifetime cost advantages. Typical motor system costs are 10% for materials and 90% based on energy used for operation. So there is significant potential for reduction in the lifetime costs of motor systems with greater efficiency.
Higher efficiencies can be achieved by special motor design, selection of motor type, an addition of an adjustable speed drive (ASD) for systems which do not have this sort of control, and by improvements in the control circuitry. In terms of special motor design and selection of a particular type of motor, permanent magnet motors have been a focus and usages has been on the rise. Efficiencies for permanent magnet motors can be as high as 93% which exceeds the Europe’s premium efficiency standard (IE3).
Smartly integrated analogue microcontrollers offer benefits for ASDs and control circuitry improvements. Figure 3 shows a block diagram of a motor control system. Cost effective integration of an ARM based CPU subsystem, PWMs, ADCs and muxing translates to system level BOM reductions for an ASD.
Figure 2: block diagram of motor control system.
Control circuits can be improved by using a highly accurate ADC with fast conversion times. This leads to efficiency gains for the overall motor system. An ADC with greater than 12 bits of accuracy improves the precision with which the phase currents can be controlled. But sample conversion latency cannot be traded off for higher accuracy. This eliminates the options of an ADC that averages or oversampling to improve SNR. Variables need to be measured at the rate the end machine is moving (e.g. pick and place machine). Fast conversion times complemented with a fast ARM microcontroller core allows a control loop to run faster resulting in better response and settling times. In turn this can increase the throughput and efficiency of a manufacturing production line system, resulting in lower production costs.
next; system timing design…
As with solar PV applications, SAR ADCs are a good choice for motor control. In the motor control case, a high performance SAR ADC can be designed without the need for averaging or oversampling to meet requirements.
The various IP blocks in Figure 2 need to be very carefully designed so that they work very well together. The desired result is a very agile instrumentation subsystem that can acquire multiple, precisely scheduled samples and deliver them efficiently to the ARM’s main memory. In the motor control case, both of the motor phase-winding-currents and other measurements can by synchronously sampled at a precisely specified points in the PWM cycle. The sampled data can then be efficiently moved, with no overhead, to the microcontroller’s memory for processing. Five different blocks in the analogue microcontroller need to work in concert to achieve this task.
The cycle starts with a PWM pulse sent to the trigger routing unit (TRU) which has the job of connecting trigger masters to trigger slaves. In this case the PWM is the trigger master and the ADC controller (ADCC) timer is the trigger slave. The ADCC needs to be able to manage a large number of events and uses the timers (TMR0/TMR1) to tracks how long from the PWM trigger to initiate a particular ADC event. With a timer match to a particular event, ADC channels are selected and the convert start signal is sent to the ADC. Sample data is moved from the ADC to ADCC and then from the ADCC to the microcontroller SRAM via DMA.
Figure 3 shows the relative timing between PWMs pulses, PWM sync, and ADC events controlled by the ADCC.
Figure 3: timing for sampling of five different motor control variables using ADCC
Good base IP starting points were available for PWMs, TRU, muxing, buffering, SAR ADCs, and DMA for design of an analogue microcontroller targeted at motor control. However specific design modification of these block was necessary in order to achieve the level of coordination required for precise timing of ADC sampling within a PWM period. The need for the ADCC block is based on the fact that the other IP blocks are integrated into a single chip and require coordination. The ADCC is designed to this requirement and to fully utilise the high speed of the two ADCs engines which have a fast convert time of 380 nsec.
Conclusion
Advanced base technology is just the starting point – chip designers must not only have broad knowledge of customers’ systems, but also have deep expertise in the design, application, and optimisation of the precision analogue and digital components; and the associated IP/software components. In addition, silicon manufacturers must be willing and able to directly interact and collaborate with system manufacturers to create new products. The most appropriate components are selected, modifications are made to optimise for the end application and IP blocks are modified to work well together. It is only then that the optimised pieces can be integrated together. Examples of these “smart integrated” products can be found from Analog Devices, including the ADuCM360, a fully integrated, 3.9 ksample/sec, 24-bit data acquisition system, and the ADSP-CM403F and CM408F Mixed-Signal Control Processors that integrate dual high precision 16 bit ADCs and ARM Cortex-M4TM processor cores.
References
1. M. Murnane, “Robust Completely Isolated Current Sense Circuit with Isolated Power Supply for Solar Photovoltaic Converters”, CN-0280 Circuit Note, www.analog.com
2. D. O’Sullivan, J. Sorensen, A. Murray,”Motor Control Feedback Sample Timing Using the ADSP-CM408 ADC Controller”, AN-1267 Application Note, www.analog.com
3. “ADSP-CM402F/CM403F/CM407F/CM408F Mixed-Signal Control Processor with ARM Cortext-M4”, www.analog.com, 09/2013
About the authors
Colin Duggan has a Bachelors of Science degree in Electrical Engineering from Northeastern University (Boston). His first job out of school was at Analog Devices and he has been with the company since leading to tenure of over 20 years. Colin has held a number of roles in applications engineering and marketing. Currently he is the Director of Marketing for the Embedded Systems Product Technology division. In this role he is a significant contributor to the strategy, marketing, and marketing operations of Analog Devices processor based products.
Denis Labrecque is a Marketing Programs and Business Development Manager for Analog Devices’ Embedded Systems Products and Technology division. Denis has been with Analog Devices for 14 years, starting as marketing manager for ADI’s SoundMAX PC audio group before assuming his current role. Denis has edited and written numerous technical articles and presentations, and has been a featured speaker at major industry events.
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