Analogue IP blocks expand functionality in ASIC offering
The collaboration qualifies several of Hexius Semiconductor’s analogue intellectual property (IP) blocks for fabrication in ON’s ONC18 0.18 µm CMOS process. The eight initial designs resulting from this collaboration include a variety of analogue-to-digital converters, digital-to-analogue converters, voltage references and current references. There is provision, if needed, for the designs to be custom-tailored to match particular application demands. Further data converter and PLL designs are currently being developed for introduction later in 2017.
ON Semiconductor’s ONC18 process relies on a 0.18 µm (180 nm) CMOS architecture and due to its high voltage capabilities is suited to automotive, industrial, military and medical deployment. By having access to a growing portfolio of qualified IP that supports this process, designers will be able to benefit from ASIC implementations that are highly optimized for their specific requirements, without needing to allocate too much of their own engineering resources to the task.
“Through the combination of the respective skill sets that our two companies possess, we are in a position to supply the industry with qualified analogue IP macrocells on superior semiconductor processes that will deliver clear performance and logistical advantages. This will allow OEMs to respond more quickly to market opportunities that they have identified by taking products from the concept phase right through to full commercial production in the shortest possible time,” comments Chris Cavanagh, CEO at Hexius Semiconductor.
ON Semiconductor; www.onsemi.com
Hexius Semiconductor is located in Tempe, Arizona. The company specializes in IP development for analogue and RF ICs; www.hexiussemi.com
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