Andes and IAR accelerate automotive IC design

Andes and IAR accelerate automotive IC design

Business news |
By Christoph Hammerschmidt

Andes Technology and IAR Systems have announced that leading IC design companies from Europe and Asia have adopted AndesCore RISC-V automotive CPU IP and IAR Systems’ functional safety certified development tools for RISC-V. The joint products from Andes and IAR Systems have robust design methodology according to ISO 26262, accelerating time to market for customers by shortening the rigorous certification process.

AndesCore automotive CPU is a functional safety enhancement edition of N25F, which is one of the bestselling RISC-V cores. To achieve automotive functional safety, the core is meticulously designed to prevent systematic failures and it’s controlled by product safety mechanisms to avoid random hardware failures.

IAR Embedded Workbench for RISC-V is a complete development toolchain including the powerful IAR C/C++ Compiler and a comprehensive debugger. The companies’ combined expertise provides joint customers with best-in-class performance and safety for automotive applications.

“We are collaborating with IAR Systems to support customers worldwide in product development of automotive SoCs. With AndesCore automotive core, we ensure customers can leverage the ISO 26262 certified CPU IP and Safety Package to their product certification process. Andes is the first RISC-V processor IP vendor to get process certifications for both Hardware (ISO 26262-5) and Software (ISO 26262-6) with complete development process to help customers meet ASIL D requirements.” said Dr. Charlie Su, President and CTO of Andes Technology.

“IAR Systems’ partnership with Andes is helping our mutual clients ensure functional safety in their products. RISC-V technology continues to move fast forward and break new ground for innovations, and we will continue to drive change in the industry by supporting both the ecosystem and our customers with professional development tools.” said Anders Holmberg, CTO of IAR Systems.

The first AndesCore automotive RISC-V CPU is expected to be certified by SGS-TÜV Saar GmbH in H1 2022.


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