Ansys tools tackle reliability of 2nm nanosheet transistors
Ansys has certified two key power integrity tools for TSMC’s N2 2nm process technology to help designers address thermal self-heating effects for greater chip reliability and more optimized designs.
The certification of the RedHawk-SC and Totem tools for power integrity signoff in the N2 process includes the effects of self-heat on long-term reliability of wires and the new 2nm nanosheet transistors.
As technology scaling continues, the self-heating effect from switching devices and current conduction in interconnects can affect circuit reliability. Ansys and TSMC have collaborated to correctly model this with a heatsink-aware flow that increases thermal predictive accuracy by taking into consideration the heat conduction to neighbouring wires that may cool a local hot spot. These calculations allow designers to assess margins with predictive accuracy and increase circuit performance by avoiding wasteful over-design.
This latest collaboration builds on the recent certification of the Ansys platform for TSMC’s N4 and N3E FinFLEX processes. It also follows certification of tools from Synopsys, cadence and Siemens EDA for TSMC’s 2nm process, indicating the maturing of the design flow for prototype chips in 2024 and production in 2025.
- Cadence uses AI to automate move to 3nm and 2nm
- Siemens EDA certifies Calibre, FastSPICE for TSMC 2nm
“TSMC works closely with our Open Innovation Platform (OIP) ecosystem partners to help our mutual customers achieve the best design results with the full stack of design solutions on TSMC’s most advanced N2 process,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC.
“Our latest collaboration with Ansys RedHawk-SC and Totem analysis tools allows our customers to benefit from the significant power and performance improvements of our N2 technology while ensuring predictively accurate power and thermal signoff for the long-term reliability of their designs.”
- TSMC says 2nm on track for 2025 as it broadens 3nm offer
- TSMC shows 2nm nanosheet transistor plans for 2025
“Ansys has developed a comprehensive thermal management flow for the entire semiconductor to system design flow,” said John Lee, vice president and general manager of the electronics, semiconductor, and optics business unit at Ansys. “Our ongoing collaboration with TSMC extends our multiphysics analysis to the latest, most advanced process technologies where we have jointly developed novel solutions to manage heat and thermal dissipation in high-speed applications.”
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