Apple boosts transistor count in 5nm M2 chip

Apple boosts transistor count in 5nm M2 chip

Technology News |
By Nick Flaherty

Apple has launched its M2 processor, boosting the transistor count from 16bn to 20bn in a second generation 5nm TSMC process and more focus on memory and bandwidth.

The chip doubles the memory bandwidth to 100GB/s to 24Gbytes of unified LPDDR5 memory via a 128bit wide interface.

This supports the same eight ARM-based cores, four for high-performance operation and four for high-efficiency with a higher clock frequency and larger cache. Apple says the chip is 18% faster, implying a 3.7GHz clock compared to the 32GHz on the M1. The caches are increased to 192KB for instructions and 128KB for data for the high performance cores and these have a shared 16MB L2 cache. The high efficiency cores have a 128KB I-cache and 64KB data cache with 4MB of shared L2 cache.

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A new custom graphics processor unit has 10 cores, up from eight in the M1, while the neural network unit (NNU) is 40% faster at 15.8TOPS. These two are the key to improving the energy efficiency and battery life of laptops with up to 25 percent higher graphics performance than M1 at the same power level, and up to 35 percent better performance at the maximum power consumption.

“M2 starts the second generation of M-series chips and goes beyond the remarkable features of M1,” said Johny Srouji, Apple’s senior vice president of Hardware Technologies. “With our relentless focus on power-efficient performance, M2 delivers a faster CPU, GPU, and Neural Engine. And along with higher memory bandwidth and new capabilities like ProRes acceleration, M2 continues the tremendous pace of innovation in Apple silicon for the Mac.”

The chip is being used in the latest MacBook Air and 13-inch MacBook Pro laptops.

With the M1 chip, Apple developed a version with two die connected via its UltraFusion high speed interface to provide double the performance using a CoWoS-S (chip-on-wafer-on-substrate with silicon interposer) 2.5D process. An M2 Ultra with more memory support is expected

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