Apple gives a foundry lesson
People in the market for an iPhone 6s or 6s Plus, may have heard that there’s two different chips (Apple’s A9 SoC) powering the phones – one manufactured by Samsung and the other by TSMC. While the chip from both foundries are supposed to perform identically, the manufacturing processes used by TSMC and Samsung are not the same.
Once the secret of the Apple dual sourcing was out, gadget Web sites began testing the phones to compare the two version of the A9 processor. The result showed that the two versions do not appear to operate exactly the same. This could have a legitimate impact on which phone consumers chose, depending on how they use their phones. This situation has led to some consumer concerns that may have been inflated by some unrealistic testing.
One real difference is the physical size of the SoC – the Samsung die is 8% smaller than the TSMC chip. The size difference could be due to some small difference in the transistor size. Both companies have new 3D transistor processes – TSMC advertise its process as 16 nm FinFET, while Samsung calls its process 14 nm FinFET, implying the Samsung transistor should be smaller than the TSMC transistor. But the process names are no longer directly connected to process feature sizes and are now more marketing designations.
The difference in die size might also be explained by the different design libraries used to build the two chips. Even though the chips are functionally identical, the A9 design team had to work with each foundry’s unique design libraries. For example, the SRAM cell used for caches can differ in transistor count and area depending on the design of the standard library. But this difference in die size should not impact a consumer’s experience in any way.
Testing from a number of sites have shown that there’s another difference – the TSMC parts (at least those few tested so far) have shown to have longer battery lives than the Samsung version. The actual extent of the difference is a matter of some controversy. Some tests, like GeekBench and AnTuTu, have shown a significant difference in battery life between the two chips.
Apple felt compelled to comment. The company said the differences should be only 2 to 3% in real world conditions. Apple’s response gets to the core of the problem: Were the tests real world enough? The tests did show that under heavy CPU-focused processing, the battery did drain faster. But in real world conditions, a normal user would use the CPU periodically, not constantly. That said there does seem to be some significant differences between the two chips and the question is why the difference.
There are two primary reasons why the TSMC chip could get better battery life is lower leakage current or a slightly lower supply voltage than the Samsung part. In general, higher leakage current would mean shorter battery life even during standby operations where as the effects of higher operating voltage would most likely show up under heavy workloads.
Leakage current is the result of transistors that don’t completely turn off in the logical off state, allowing a small amount of current, “leakage,” to pass through. This leakage current is a slow, subtle drain on the battery even while the processor is idling.
In this case, the primary power difference is most likely the operating voltage of each part. In smartphones there is a chip called the power management IC (PMIC) that controls the voltages to the processor that vary under different operating conditions. The PMIC is used to control the fine-grained details of the power management that help stretch battery life by lowering the power of the processor and slowing the clock speeds when workloads are light. In order to hit the same performance and clock speeds as the TSMC part, it is possible that the Samsung parts operated a slightly higher voltage, drawing more power from the battery.
The test that showed the most difference in battery life, suggests the Samsung part is running at a slightly higher supply voltage to meet the Apple’s clock speed requirements. The higher operating voltage could be a result of many different process variables, but the result is higher power consumption under load. For this to be a true judge of the variation in a Samsung vs. TSMC process, it requires a larger statistical sampling than just two chips. Even within one foundry, there can be a significant variation. So the limited tests performed by a few publications cannot be considered the definitive word on the situation.
While the TSMC chip saves some power, the smaller Samsung die size could save Apple some money. Assuming both foundries have similar yields (the percentage of chips that test good over the raw die produced), the smaller die area means that more die can fit onto the same wafer. With additional units yielding from one wafer, the fixed costs for each good die will be lower. The difference in die area is only 8% but this leads to just over 9% more gross die per wafer.
When factoring the effects of early manufacturing yields, this actually translates into about 11% more good die per wafer. The higher good die yield per wafer translates into lower costs per die. The actual cost depends on the cost per good die of packaging and test, but even an 8% die cost savings is significant over tens of millions of units.
In addition, more good die per wafer means Samsung is able to deliver more parts if wafer production is normalized between it and TSMC. With the cost and production volume advantages, Apple may have overlooked a little higher power consumption in favor of lower pricing from Samsung.
For consumers, differences between the chips will be hard to discern. Extreme tests have exaggerated subtle chip differences, but few products get as over-analyzed as those from Apple.
About the author:
Kevin Krewell is a principal analyst at www.tiriasresearch.com
Related articles:
Teardown: Knowles wins microphone slots in iPhone 6S
Apple unveils new chips for mobile
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
