Apple M1 Max boasts 57 billion transistors on a 5nm process

Apple M1 Max boasts 57 billion transistors on a 5nm process

Technology News |
By Jean-Pierre Joosting

Apple has launched its most complex ARM-based chip with 58 processor, GPU and neural network cores for its laptop business, the M1 Max.

The M1 Max and Pro chips use the TSMC N5 5nm process technology with a system-on-chip unified memory architecture. The M1 chips have a 10-core CPU with eight high-performance cores and two high-efficiency cores, with 16 GPU cores in the M1 Pro and 32 GPU cores in the M1 max.

The  M1 Pro has 33.7 billion transistors with 200GB/s of memory bandwidth with support for up to 32GB of unified memory while the M1 Max with 57 billion delivers up to 400GB/s of memory bandwidth with up to 64GB.

“M1 has transformed our most popular systems with incredible performance, custom technologies, and industry-leading power efficiency. No one has ever applied a system-on-a-chip design to a pro system until today with M1 Pro and M1 Max,” said Johny Srouji, Apple’s senior vice president of Hardware Technologies. “With massive gains in CPU and GPU performance, up to six times the memory bandwidth, a new media engine with ProRes accelerators, and other advanced technologies, M1 Pro and M1 Max take Apple silicon even further, and are unlike anything else in a Pro notebook.”

Both chips use an Apple-designed media engine that accelerates video processing while maximising battery life as well as dedicated acceleration for the ProRes professional video codec introduced in the iPhone 13.

The chips include a 16-core Neural Engine for on-device machine learning acceleration and improved camera performance, while Apple’s custom image signal processor, along with the Neural Engine, uses computational video to enhance image quality. A new display engine drives multiple external displays.

Apple is only half way through its two-year transition to ARM-based silicon, indicated a 3nm chip in development.


Further reading

Google develops smartphone processor for Pixel 6
The markets and applications for embedded FPGA
Cadence, ARM jointly support 5nm Neoverse data center chip design

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