Arasan launches dual-mode xSPI/eMMC PHY IP
Arasan Chip Systems has rolled out what it says is the industry’s first combo PHY IP that supports both xSPI NOR flash and eMMC NAND flash in a single unified block. The xSPI + eMMC Combo PHY IP is available immediately and is aimed at SoCs and MCUs that need both high reliability and cost-efficient bulk storage.
For eeNews Europe readers working on embedded, automotive, industrial, aerospace or medical designs, the announcement matters because it tackles a familiar trade-off: choosing between reliable NOR for boot and critical code, or higher-density NAND for data. Arasan’s approach promises to support both without duplicating PHYs, pins, or silicon area.
One PHY for NOR and NAND
The new IP integrates an xSPI PHY and an eMMC 5.1 PHY into a single solution, allowing designers to support two different memory protocols with the same PHY. Arasan is positioning the combo strongly for mission-critical applications in defense and aerospace, where NOR flash is often required for reliability, alongside NAND flash for mass storage. The company also highlights medical devices and other life-critical systems as target markets.
By offering a combined NOR and NAND PHY, Arasan is effectively telling customers they no longer have to license and integrate separate PHY IP blocks to cover both memory types. This can simplify SoC architectures, especially in designs that must boot reliably from NOR but still store large amounts of data.
Shared I/O cuts pins and area
According to Arasan, the xSPI + eMMC Combo PHY IP is built around a shared I/O and analog front-end architecture. This shared approach reduces pin count and silicon footprint compared with discrete PHY implementations, which in turn lowers system cost and power consumption.
“This dual-mode PHY allows customers to seamlessly support both eMMC and next-generation xSPI devices with a single low pin count IP, lowering system cost and accelerating time to market. With the launch of our xSPI + eMMC Combo PHY IP , Arasan continues to push the boundaries of storage interface IP innovation,” said Ron Mabry, VP of Sales at Arasan.
The combo PHY is designed to integrate seamlessly with Arasan’s existing xSPI + eMMC Combo Controller IP, allowing customers to license a matched controller-PHY solution if desired.
Broad portfolio and immediate availability
Arasan says it has shipped over 200 licenses of its eMMC IP and describes itself as a leading provider of xSPI IP, covering both NOR and NAND flash markets individually and now jointly. The xSPI + eMMC Combo PHY IP is available to license now on leading foundries, supporting process nodes from 28nm down to 3nm.
With embedded systems under pressure to do more in less area, Arasan’s combined PHY approach reflects a broader trend toward tighter integration in storage interface IP.
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