ARM edges closer to full 2nm chip designs with Total Design
Cette publication existe aussi en Français
ARM has launched the next step in its move to supplying complete 2nm chip and chiplet designs through an ecosystem of partners.
The ARM Total Design aims for ‘frictionless delivery’ of the high performance Neoverse cores for data centre and AI chips. While ARM is supplying the key IP for 2nm custom chips, the route to market is through partners such as chip design houses Sondrel and Cap Gemini in Europe and global EDA tool suppliers Synopsys and Cadence.
“[This] unites industry leaders – ASIC design houses, IP vendors, EDA tool providers, foundries, and firmware developers – to accelerate and simplify the development of Neoverse CSS-based systems,” said Mohamed Awad, senior vice president and general manager of the Infrastructure business at ARM.
He is emphasising the support for emerging multi-die chiplet designs using the AMBA CHI C2C and UCIe interconnect specifications. Japanese design house Socionext is using the Neoverse CSS technology for a 2nm chiplet-based system in package for server CPUs, data centre AI edge servers, and 5/6G infrastructure.
ARM is aiming to help companies produce leading edge custom system on chip or system in package devices by providing as much of the design as possible. However it is sidestepping the risk of competing with its existing chip making customers with this partnership of the ecosystem.
- How the data centre moved to custom chips
- ARM extends CSS compute subsystem to custom data centre chips
“ARM Total Design means that ASIC design houses can have designs started and on-the-shelf ready to go, IP vendors can pre-integrate, pre-validate, and pre-optimize advanced IP for Neoverse CSS, EDA partners can ensure seamless support into the most advanced tools and flows in order to streamline SoC design, commercial firmware solutions can be developed long before silicon availability, and Neoverse CSS designs will be specifically optimized to take advantage of leading-edge process nodes.!
“With ARM Total Design, we’re engaging critical ecosystem expertise at every stage of SoC development to make specialized solutions based on Neoverse widely available across the infrastructure, including AI, cloud, networking, edge, and more,” he said.
The package includes pre-integrated, validated IP and EDA tools from partners like Cadence, Rambus, and Synopsys to help accelerate silicon design and the integration of memory, security, and peripheral IP alongside the Neoverse core.
Design services from partners including ADTechnology, Alphawave Semi, Broadcom, Capgemini, Faraday, Socionext, and Sondrel, support the ecosystem with expertise on Neoverse CSS, other Arm IP and methodology.
Technology optimized for leading-edge process nodes and advanced packaging techniques from foundry partners, including Intel Foundry Services and TSMC. Both are looking at producing the chips on 2nm process technologies in 2025.
“We specialise in ultra-complex ASIC designs on leading nodes. These new high-performance cores will enable us to design next generation chips for demanding, compute intensive applications. Crucially, we are one of the few partners to offer a full, turnkey service from concept through every stage to final chips,” said Graham Curren, CEO of Sondrel in the UK which has used ARM cores in hundreds of designs. “This provides customers with peace of mind that their multi-million-dollar investment in a new chip project will progress smoothly with every stage being handled by our in-house experts.
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
