ARM promises 50x, and more, AI power from DynamIQ architecture

ARM promises 50x, and more, AI power from DynamIQ architecture

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By Graham Prophet

Looking out on a 3-5-year timescale, ARM sees the need for greatly increased compute power in all of those areas; many of them will also require more immediate responsiveness (i.e. real-time behaviour) and will not be able to rely on “the cloud”. A the same time the pressure lower power and energy-efficient computing will only grow.


DynamIQ will be complementary to all of ARM’s prior architectural developments, and will extend the number of cores that can form a cluster to eight. DynamIQ will benefit both massively-parallel and heterogeneous computing; every core in a cluster can be identical, or different. The structure progresses onwards from big.LITTLE, with a new shared memory (between CPUs) scheme. For power management, there will be more detailed control of processors speeds, quicker entry and exit of sleep states, and more autonomous power management within compute systems. Responsiveness will be enhanced, ARM says, with the ability to place function acceleration much closer to the “core” of the compute system.


DynamIQ is being presented as the biggest micro-architectural shift since ARM announced 64-bit ARMv8-A in 2011, a multicore microarchitecture that will serve as foundation for all new Cortex-A processors (both big and little) beginning this year (2017). Going forward, Cortex-A is expected to be more prominentdue to this new technology which opens opportunities to go far beyond mobile and into other applications.


In artificial intelligence, new dedicated instructions for AI and ML will deliver a 50x boost in AI performance over the next 3-5 years. ARM offers this as a conservative number based on projections based on established AI algorithms. DynamIQ will offer “true acceleration” for AI, ARM adds.


Autonomous systems of all sorts will also benefit. The most obvious is ADAS and autonomous driving, but the need for more responsiveness, and for adaptive systems is cited. Reaching SIL3 is a a milestone, and the resources to build systems that “fail gracefully” – with benign failure modes – also demands more local resource.


In networking, the fact that ARM can now scale to eight cores on a single cluster is “huge” for those environments. ARM now scales higher with significantly reduced latency through more efficient CPU-to-CPU communications. In server/cloud computing ARM points to future ISA enhancements; DynamIQ will be the second ARMv8-A ISA enhancement ARM has announced to-date, joining scalable vector extensions (SVE).


And in mobile, with the priorities around heterogeneous computing and device-based AI on mobile devices as well as notebooks, ARM says this architecture is much more flexible and configurable than its previous iterations of big.LITTLE. Among the areas to gain will be mixed- and virtual-reality (MR/VR).


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