Automated software-driven verification tool
With SOCX-Verifier, SoC designers can now bridge and greatly accelerate the arduous hardware-software co-design process. Traditionally, SoC hardware and software teams have worked in silos with each team being focused on their specific concerns or objectives. As a result, the efforts in writing test software or drivers during system-level verification rarely get re-used by the software team. While there are flows that are based on virtual platforms and emulation platforms, there is still a huge amount of effort and cost involved in developing embedded software for SoCs. SOCX-Verifier closes this gap by providing all the necessary building blocks for driver-model generation, scenario specification and virtualizing test-bench interaction to give verification teams a speedier closure and effective system-level verification. Further this also enables the software developers to deliver production ready software drivers at a 10x efficiency level, according to Vayavya Labs.
Current SoC development requires designers to approach the SoC as a combination of hardware and software to be verified together. Software-driven verification methodology is a step in that direction which harnesses the embedded processor core’s power to verify the SoC from “Inside-Out.”
SOCX-Verifier provides verification designers with the required infrastructure and building blocks for driver-model generation, scenario specification and virtualizing test-bench interaction for a speedier closure and effective system-level verification. It consists of two main components: SOCX-Specifier and SOCX-Virtualizer.
SOCX-Specifier provides the canvas for capturing the scenario specifications and generates C test cases from this specification. The C test cases execute on the embedded processor core(s) in the SoC and access the design-under-test (DUT) components (design IP blocks) and the test-bench.
SOCX-Virtualizer virtualizes access to the DUT components as well as the test-bench across various verification platforms. It achieves this by means of a “verification aware” lightweight operating system (OS) and the DDGen tool which automatically generates device drivers for the DUT components.
SOCX-Verifier compiles the scenario representation and translates it into a ‘C’ test-application. The test-application including the generated device drivers and Verification-OS are linked together to generate the test-software.
Visit Vayavya Labs at www.vayavyalabs.com
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