Beating the jitter bug – how to apply multiple measurement strategies to identify noise source
The first step to beating the jitter bug is to know your enemy.
What causes jitter?
There are several causes of jitter. Some of them are as follows:
- System phenomena, such as crosstalk from radiated or conducted signals, dispersion effects, and impedance mismatches.
- Data-dependent phenomena, due to the pattern of data in the bitstream data. This can result in inter-symbol interference, duty-cycle distortion, and pseudorandom periodicity in the bitstream.
- Random-noise phenomena, caused by thermal effects, noise associated with electron flow in conductors, shot noise caused by electron and hole noise in semiconductors, or pink noise spectrally related to the inverse of the clock frequency.
Random versus deterministic
Jitter sources are often categorised as ‘bounded’ or ‘unbounded’.
Bounded jitter sources reach maximum and minimum phase deviations within an identifiable time interval. Bounded jitter is due to systematic and data-dependent phenomena. Unbounded jitter sources are random, and can (in theory) have infinite amplitude.
The total jitter on a signal, defined as its phase error, is the sum of the deterministic and random jitter affecting it.
The deterministic jitter component is defined by adding the maximum phase advance and phase delay it produces, while the random jitter is the sum of all the random noise sources affecting the signal.
Looking jitter in the eye
How do you know how bad your jitter problems are? An eye diagram can help, superimposing all the bit periods of a captured waveform, as in Figure 1.
This eye diagram has smooth transitions at the left and right crossing points forming a large, wide-open ‘eye’ in the centre. At point X, the waveform should have settled and so can be sampled with the least chance of a bit error. Figure 2 shows a more realistic eye diagram, which reveals a lot about the signal.
Let’s list them:
- The amplitude of the bottom of the waveform varies less than that at the top, so the signal seems to carry more 0s than 1s;
- There are four different trajectories in the bottom, so at least four 0s in a row are possible;
- There are only two trajectories at the top of the waveform, so it carries a maximum of two 1s in a row;
- The waveform has two different rising and falling edges, showing that it is subject to deterministic jitter;
- The rising edges have more spread than the falling edges, and some of the crossover points intersect below the threshold level, showing that duty cycles are being distorted causing 0s to have a longer On time than 1s.
Other ways to think about jitter
There are other ways of visualising jitter, and applying several of them to a signal can help identify the sources of jitter.
A histogram plots the range of values exhibited by a parameter along the x-axis versus the frequency of its occurrence on the y-axis. In jitter analysis, histograms can plot waveform parameters such as rise time, fall time, period, or duty cycle, to reveal conditions that can be correlated with circuit conditions.
The histogram in Figure 3 shows period jitter in a clock signal. The double peak at right suggests that the signal includes second and fourth harmonics.
The bathtub plot
The bathtub plot in Figure 4 graphs the bit error rate (BER) of a signal versus its sampling point. The horizontal scale represents the time it takes for one symbol to be transmitted. BER is represented on a vertical log scale.
When the sampling point is at or near the transition points (0 and TB), the BER is 0.5 meaning it is equally likely that a bit will or will not be transmitted successfully. The curve is fairly flat in these regions, dominated by deterministic jitter. As the sampling point shifts away from the transition point, the BER drops off rapidly as the jitter becomes dominated by random processes. The bathtub plot shows that, as in Figure 1, the best time to sample the signal is halfway between its symbol’s transitions.
In the frequency domain
Looking at the frequency distribution of jitter spectra can reveal deterministic jitter sources, which appear as line spectra. This approach can also reveal phase noise or jitter-versus-frequency offsets from a carrier or clock.
Phase-noise measurements provide insights into phase-locked-loop or crystal-oscillator designs, and can help identify deterministic jitter due to spurious signals. Such measurements can help optimise clock-recovery circuits and reveal internal noise sources.
Figure 5 shows the intrinsic jitter spectrum of a phase-locked loop. The noise peaks at a 2 kHz offset. There are also lines that identify deterministic jitter sources from 60 Hz to approximately 800 Hz, probably generated by the power lines. Frequency lines are also evident from 2 to 7 MHz, probably derived from the reference clock. Another way to obtain a frequency-domain view of jitter is to take a fast Fourier transform (FFT) of the time interval error data (the phase difference between the signal being measured and the reference clock), an approach that can reveal high-level phenomena quickly.
Jitter robs digital signals of their power to protect the information they carry from interference. Applying multiple measurement strategies can provide more insights about the characteristics and sources of noise than might be expected from what at first seems like a simple time offset of the signal – and so help engineers beat the jitter bug.
About the Author
Andrea Dodini is Marketing Manager at Keysight Technologies for Small and Middle Size Enterprises (SME) and for Keysight Core Product Lines in Europe, the Middle East, Africa and India (EMEAI).
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