BERT supports next-generation technologies operating up to 1 Tbit/s
The latest functionality of the MP1800A provides R&D engineering teams with an accurate test solution to quickly verify designs incorporating ultra-fast, next-generation communications technologies for cloud-computing and smartphone data applications.
Up to four MP1800A main frame units, each with an 8-channel 32.1 Gbit/s pulse pattern generator (PPG), can be linked with the 32-channel synchronization function. Because the MP1800A BERT features a built-in PPG module, it is easy to configure a test system with accurate skew control and high repeatability, two key requirements when evaluating high-speed communications technologies that operate at transmission speeds of 400 Gbit/s to 1 Tbit/s.
Skew in the built-in 32G PPG can be adjusted in 2-mUI steps over a range of +64,000 mUI (64 bits) at multi-channel synchronization. The PPG in the MP1800A BERT also incorporates a pattern synchronization function for controlling the pattern generation timing between multi-channel data signals. The result is a test system that can generate signals with a typical high-speed rise time of 12 ps to meet the signal quality required for evaluating phase amplitude transmission systems such as Quad DP-16QAM and Dual DP-64QAM.
Complementing the new synchronization function is the MP1800A BERT’s support of the generation of 4PAM and 8PAM signals. Combining the MP1800A with either the MZ1834A 4PAM converter or MZ1838A 8PAM converter enables easy configuration of a comprehensive test system for next-generation, ultra-fast transmission technologies.
The 32-channel synchronization function is the latest enhancement to the MP1800A, a highly expandable, plug-in, modular-type BERT. In addition to incorporating a PPG for outputting high-quality, high-amplitude signals, the MP1800A features an Error Detector (ED) module with high input sensitivity to support signal analyses, including burst pattern, Bathtub Jitter and EYE Diagram measurements. Various types of jitter, such as SJ, RJ, BUJ and SSC, can be generated using the built-in jitter modulation source, supporting device jitter tolerance tests.
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