MENU

Blueshift Memory to use Codasip for memory-efficient RISC-V processor

Blueshift Memory to use Codasip for memory-efficient RISC-V processor

Business news |
By Nick Flaherty



UK startup Blueshift Memory has teamed up with German processor designer Codasip to integrate RISC-V processor IP into an FPGA-based design for memory architecture.

Blueshift is using Codasip’s Studio tools to modify a RISC-V core to maximize memory bandwidth and overcome one of the major restrictions for computer architectures.

“This is a very exciting development for us, as it will be the first time our ground-breaking Cambridge Architecture is being incorporated into a processor,” said Peter Marosan, founder and CTO of Blueshift Memory.

“Codasip’s architecture licence and its unique tools give us the ability to easily customize the design to include our functionality, while still maintaining software compatibility and all the benefits of the RISC-V ecosystem. This enables us to demonstrate our potential to break through the ‘memory wall’ that is holding back performance.”

Blueshift Memory IP can be integrated into either memory chips or processors, or can be used in a stand-alone memory controller. As well as optimizing data handling in memory-intensive applications like Big Data and High Performance Computing, the technology is also capable of boosting performance in cloud data centres and in edge computing for 5G/6G.

“The faster data transfer and energy-efficient processing enabled by the architecture herald a real breakthrough in the way data will be handled in the future. The Codasip custom compute architecture license and Codasip Studio provide a rapid and easy-to-use route to customize a RISC-V processor, which will be a key part of that journey,” said Marosan.

Blueshift started a 13-month UK project last year to develop a module based on the Cambridge Architecture that dramatically increases memory bandwidth, and the final design will include a customized Codasip RISC-V core.

As well as helping to create a memory accelerator product, the project will also enable the company to demonstrate the potential benefits of the Cambridge Architecture IP for larger system-on-chip designs incorporating RISC-V.

www.blueshiftmemory.com; www.codasip.com

 

If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News

Share:

Linked Articles
10s