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Chipus analog IP is being validated in SilTerra’s 180nm ultra-low leakage CMOS manufacturing process I18L. The validation is being done in two phases with a first wave of IP cores running in April 2018 and a second wave due to be processed in 3Q18, the company said.

Chipus preliminary IP list for I18L contains: oscillators, a 12bit, 5msps SAR ADC, 12bit resolution temperature sensor, power management blocks including LDOs, bandgap reference and current generator, dc/dc converters and a PMU for IoT ASICs covering up to 600nA of current draw.

The IP list is still preliminary and other IP blocks may be included according to requests from leading customers.

“It comes in handy to drive our solutions for battery-powered IoT devices and a great opportunity to continue showing why we have been trusted by SilTerra for the last seven years,” said Murilo Pessatti, CEO of Chipus, in a statement.

SilTerra’s I18L process is intended for such applications as remote sensors, wearables, smart meters, and other low-power embedded systems (see Foundry positions process for sensor hub ICs). The technology offers modular process option such as RFCMOS passive and active devices, as well as embedded flash memory, which is a bonus for single -chip IoT sensor hub designs.

Related links and articles:

www.chipus-ip.com

www.silterra.com

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