Cadence attacks design challenges with software updates, new DSP
In his keynote speech at CDN Live, Cadence Senior Vice President Tom Beckley compared the complexity of technology in former times and now: The spaceship Challenger that in 1986 exploded shortly after takeoff used some 500.000 lines of software code. The multitude of computers in an average vehicle of our days run more than 100 million lines of codes. This example shows how complexity has increased over the past 30 years. Nevertheless, the introduction of innovative technologies such as machine vision, deep learning and the massive deployment of sensors associated with the Internet of Things will bring electronics and software to an unseen level of complexity. “Deep learning really explodes”, Beckley said. “In my 35 years (of career as an engineer) I have never seen so many opportunities for software and sensors”, he said. “But one thing hasn’t changed: Our obligation as engineers to advance technology in a safe way”, to rule out a new disaster as the Challenger explosion.
From this consideration is certainly just a small step to Cadence’s product innovations introduced at the event. After all, the new software versions certainly facilitate handling the complexity of upcoming designs – with more and more PCB layers, increasing combinations of rigid and flex PCBs and these PCBs populated by more heterogeneous component types.
The new Allegro 17.2-2016 version features comprehensive in-design inter-layer checking technology that minimizes design-check-redesign iterations and a new dynamic concurrent team design capability that accelerates product creation time by up to 50 percent. At the same time, the software supports the utilization of inlay fabrication techniques that allow designers to reduce material costs by up to 25 percent. In addition, the use of embedded Sigrity package technology ensures critical signals meet performance criteria and power integrity for PCB designers.
The new release 17.2-2016 of the PCB design software package OrCAD offers new functions for its Capture schematic capture module, its PSpice simulation function and PCB Designer modules that address challenges with flex and rigid-flex design as well as mixed-signal simulation complexities in IoT, wearables and wireless mobile devices. To enable a faster and more efficient flex and rigid-flex design creation critical to IoT, wearables and wireless devices, the OrCAD portfolio uses a new multi-stack-up database capability and extensive in-design inter-layer checks, which helps users avoid errors introduced through manual checking. The OrCAD portfolio also features enhancements targeted towards improving PCB editors’ productivity and ease-of-use in padstack editing, constraint management, shape editing and in-design DRCs. To address efficiency needs, the portfolio includes an advanced design differencing engine that enables design review with global teams using state of art visuals. Finally, to give designers more control over their design component annotation process, advanced annotation and auto-referencing capabilities are now available.
machine learning will be the main applications for Cadence’s new
Tensilica P6 DSP.
The Tensilica Vision P6 digital signal processor is said to quadruple the neural network performance capability over its predecessor P5. Thus the P6 is currently Cadence’s highest-performing vision processor and extends the company’s Tensilica portfolio into the fast-growing markets of vision processing and deep learning – a feature that is particularly in demand for the design of next-generation Advanced Driver Assistance Systems (ADAS) for vehicles but likewise for big data analysis and related applications.
Details on the P6 can be found here: https://www.electronics-eetimes.com/news/embedded-neural-networks-cadences-latest-dsp-target
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