Cadence has tools for Samsung gate-all-around process
It is not stated explicitly what minimum geometry node the Cadence tools support but Samsung Foundry has previously stated that it would have GAA processes at a 3nm node that will come in two variants – 3GAAE and 3GAAP – standing for early and plus. The process has three lateral ribbon-shaped wires inside a fin (see Samsung to introduce nanosheet transistors in 3nm node).
However, whatever the node Cadence states that as a result of collaboration with Samsung Foundry a test vehicle based on an industry-standard CPU block has been successfully taped out using extreme ultraviolet lithography.
Innovus is the name of Cadence’s digital design automation software, which has been extended to support GAA. Similarly, Quantus is the parasitic parameter extraction software that has been extended.
The GAA technology is expected to be used for leading-edge applications such as mobile, networking, server and automotive markets.
Related links and articles:
News articles:
IEDM: Samsung makes 3nm gate-all-around CMOS
Samsung to introduce nanosheet transistors in 3nm node
IMEC presents ‘n-over-p’ complementary FET proposal
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