Cadence, Nvidia to apply machine learning to EDA

Cadence, Nvidia to apply machine learning to EDA
Technology News |
EDA software company Cadence Design Systems Inc. (San Jose, Calif.) has been selected as by DARPA to be part of a research project into the use of machine learning for the design of chips, and printed circuit boards.
By Peter Clarke


The Machine learning-driven Automatic Generation of Electronic Systems Through Intelligent Collaboration (MAGESTIC) project is set to last four years and will include machine learning experts at Carnegie Mellon University and fabless chip company Nvidia.

It is under the umbrella of DARPA’s the Intelligent Design of Electronic Assets (IDEA) program, which in turn is one of six programs within DARPA’s Electronics Resurgence Initiative (see Applied, ARM to develop CeRAM for neuromorphic applications).

The goal of the DARPA investment is to help create a more automated electronics design capability that benefits the electronics industry and the aerospace and defence ecosystem, Cadence said. The program is intended to enable autonomous intent-driven design.

Cadence is already applying machine learning to improve tools and design flows and to improve intellectual property cores or to target ML with cores.

MAGESTIC program aims to: automate the routing and tuning of devices to improve reliability, circuit performance, and resilience; improve power, performance and area (PPA) results by using machine learning, analytics, and optimization. It also intends to learn from users of tools and design flows to determine best practises and compliment the use of cloud-based EDA for compute-heavy distributable workloads.

“We’ve been leading the industry in the development, deployment and support of electronic design flows that use machine learning, analytics and optimization technologies. This program will accelerate our roadmap toward realizing intelligent design flows for the next big leap in design productivity,” stated Anirudh Devgan, president of Cadence, in a statement. “This program will set the stage for enhancing the entire span of our analog, digital, verification, package and PCB EDA technologies, providing our customers with the most advanced system design enablement solutions.”

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Applied, ARM to develop CeRAM for neuromorphic applications

Cadence teams with Google, Microsoft, Amazon, on cloud-based EDA

IMEC, Cadence tape-out first 3nm test chip

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