Cadence optimises AI tool chain for 5nm ARM chips

Cadence optimises AI tool chain for 5nm ARM chips

Technology News |
By Nick Flaherty

Cadence Design Systems has optimized its RTL-to-GDS digital flow for 5nm and 7nm designs for the latest ARM cores using its AI design tools.

The rapid adoption kits (RAKs) for the ARM Cortex-A715 and Cortex-X3 CPUs and Mali-G715 and Immortalis-G715 GPUs are intended for next generation smartphone chips, with initial support from Mediatek and Samsung.  

The RAKs use a smart hierarchy design flow to improve turnaround times on large, high-performance SoC projects.

The latest ‘total compute solution’ (TCS22) support up to 12 cores in the chip with different mixes of performance and power efficiency with the X3 and A715 cores. This requires a more complex analysis and tne Cerebrus AI-driven flow optimization enables quick and efficient design-specific closure with reduced engineering effort, while iSpatial technology provides an integrated and predictable implementation flow for the fastest design closure.  

The digital flow’s integrated Tempus ECO technology for signoff offers accurate, final design closure based on path-based analysis. Finally, the activity-aware power optimization engine incorporated with the Innovus Implementation System and the Genus Synthesis Solution significantly reduces dynamic power consumption, enabling customers to achieve low-power goals.

Post-design, the verification flow includes the  Xcelium Logic Simulation Platform, Palladium Z1 and Z2 Enterprise Emulation Platforms, Helium Virtual and Hybrid Platforms, Jasper Formal Verification Platform, vManager Planning and Metrics, VIP and System VIP tools and content for ARM-based designs.

This verification flow enables developers to improve verification throughput and achieve advanced software debug for SoCs containing the Cortex-A715 and Cortex-X3 CPUs and Mali-G715 and Immortalis-G715 GPUs. The virtual and hybrid platform reference designs include the Arm Fast Models to enable early software development and verification using the Cadence Helium and the Palladium and Protium platforms, also known as the dynamic duo.

“With the delivery of ARM TCS22, we’re enabling customers to create high-performance, high-efficiency and secure products that provide an optimal user experience across a variety of mobile applications,” said Paul Williamson, vice president and general manager, Client Line of Business, ARM. “By continuing to collaborate with Cadence, our mutual customers can leverage our latest ARMv9 CPUs and the Mali-G715 and Immortalis-G715 GPUs alongside the Cadence digital and verification flows to deliver SoCs to market faster.”

“This latest collaboration with Arm further demonstrates our commitment to empowering designers to create the world’s most advanced mobile designs that provide the best user experience,” said Dr. Chin-Chi Teng, senior vice president and general manager, Digital & Signoff Group at Cadence. “Arm has utilized the latest Cadence digital and verification flow innovations to develop Arm TCS22, and we’re jointly enabling customers to leverage these latest innovations to realize optimal power and performance results and a faster path to tapeout.”

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