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Cadence uses AI to automate move to 3nm and 2nm technologies

Cadence uses AI to automate move to 3nm and 2nm technologies

Technology News |
By Nick Flaherty



Cadence Design Systems has launched an automated node-to-node design migration flow to the latest 3nm TSMC N3E and 2nm process technologies.

The migration is based on the latest version of the Virtuoso Design Platform launched last week and is compatible with all TSMC advanced nodes. The migration uses generative AI jointly developed by Cadence and TSMC to provide a simplified and automated approach to migrate custom and analog IC designs among TSMC’s process technologies. Customers already using the flow have successfully reduced migration time by 2.5X when compared with manual migration.

The Virtuoso Design Platform automatically migrates schematic cells, parameters, pins and wiring from one TSMC process node to another. The Virtuoso ADE Product Suite’s simulation and circuit optimization environment then tunes and optimizes the new schematic to ensure the design achieves all required specifications and measurements.

Cadence and TSMC customers can then automatically recognize and extract groups of devices in an existing layout and apply them to similar groups in the new layout, thanks to the Virtuoso Layout Suite’s generative design technology using templates, TSMC’s analog-mapping and routing technologies in the Virtuoso Design Platform.

“As application requirements grow, many TSMC customers are looking to migrate legacy IC designs to our more advanced nodes, such as N3E and N2, to take full advantage of higher performance and lower power benefits of the latest TSMC advanced technologies,” Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “Our ongoing collaboration with Cadence has resulted in enhanced PDKs and methodologies that simplify and accelerate the design migration process, ultimately speeding time to market.”

“Through this latest collaboration with TSMC, our joint customers benefit from our advanced technologies that make custom/analog migration simpler and far less time-consuming,” said Tom Beckley, senior vice president and general manager in the Custom IC, IC Packaging, PCB and System Analysis Group. “Our Virtuoso Design Platform’s proven node-to-node generative design migration technology can shave weeks off the time required to migrate a complex IC design between nodes, which is critical in the highly competitive chip design market.

www.cadence.com


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