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Chiplets drive hierarchical AI processor design

Chiplets drive hierarchical AI processor design

Business news |
By Nick Flaherty



Ceremorphic was founded in April 2020 by Venkat Mattela, the founder & CEO of Redpine Signals. Redpine Signals delivered low power wireless ICs and the company’s wireless assets were acquired by Silicon Labs for $308 million in March 2020.

Ceremorphic has been funded by its founders through a $50 million Series A round and the company has more than 100 patents on core technologies. It has more than 150 staff with plans to grow to 250 in 2022. The company’s first chip, the QS1 hierarchical learning processor, is being designed for implementation in TSMC’s 5nm manufacturing process. The chip leverages Ceremorphic’s patented technology and multi-thread processing architecture called ThreadArch.

“We strongly believe that building a technology foundation is key to developing highly differentiated products that can lead the industry,” said Venkat Matella CEO of Ceremorphic, in a statement. “We proved that in the wireless space with Redpine Signals and we are now doing the same thing in the computing space with Ceremorphic.”

The hierarchical learning processor (HLP) includes a custom machine learning processor running at up to 2GHz clock frequency; a floating point unit running at up to the same frequency; a multithreaded architecture – ThreadArch – based on RISC-V cores; custom video engines for metaverse graphics processing (1GHz) along with a Cortex-M55 core from ARM. The whole comes with open AI framework software support in the form of optimized compiler and application libraries.

The key for the low power consumption is a PCI Express 6.0 / CXL interface to link the different chiplets for the range of different applications, says Matella. 

The company is headquartered in Silicon Valley with a development center in Hyderabad, India.

Related links and articles:

www.ceremorphic.com

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