CMOS transistors characterised at 77K and 4k for quantum chips

CMOS transistors characterised at 77K and 4k for quantum chips

Technology News |
By Nick Flaherty

The UK CryoCMOS consortium has created high quality models of CMOS transistors at both 4K & 77K operation for the next generation of quantum chips.

UK memory designer SureCore is using the process development kit (PDK) for the GlobalFoundries 22FDX 22nm FDSOI process to develop key foundation IP to enable the design of cryo-control ASICs for use in quantum computer. Key to supporting this activity were the accurate cryogenic measurements undertaken by Incize of Louvain-la-Neuve, Belgium.

The characterisation at 4K is key for the control electronics in the cryostats used for quantum computers. The control electronics needed to manipulate the qubits is often located outside the cryostat, and the 77K characterisation also allows a closer connection.

The aim of the project is to understand and model changes in transistor behaviour at cryo temperatures, produce a suite of recharacterized transistor models and then use these to design a portfolio of CryoCMOS IP to facilitate the development of custom chips that can directly interface to the qubits inside the cryostat at cryogenic temperatures.

One of the key transistor parameters affected by low temperatures is the threshold voltage (Vt). As the temperature is lowered, the Vt increases substantially, pushing transistor selection towards low and super-low Vt variants (LVt/SLVt).

FDSOI allows optimal cryogenic design by enabling adjustments to the threshold voltage to be made by altering the back bias.

Key to getting to accurate cryogenic transistor models was the selection of a partner who could make individual transistor measurements. “We picked Incize as it is one of the few commercial companies that specialises in precise cryogenic transistor measurements in the challenging conditions of a cryostat. You can’t just rearrange the probes on chip at will in a 4K cryostat. We are really pleased with the quality of the measurement data we received from Incize,” said Paul Wells, sureCore’s CEO.

The measurement data was used by SemiWise in Scotland to develop the transistor models including both Typical-Typical (TT) transistors as well as corners (Slow-Slow, SS & Fast-Fast, FF) that will enable reliable circuit design for use at 4K and 77K.

“Standard CMOS is characterised over the usual performance parameters of -40°C to +125°C. So, taking standard CMOS down to 4K or -270°C is a major step into new territory where the operating characteristics of the transistors change markedly,” said Professor Asen Asenov, SemiWise CEO.

A combination of measurement and simulation data is being used by SemiWise to re-centre the foundry transistor SPICE models for cryogenic temperatures so that the 22FDX node can be used for reliable cryogenic circuit design.

The patented SemiWise re-centring technology allows the development of typical and corner transistor models as well as statistical mismatch models, all critical to the SRAM design process. Based on these re-centred cryogenic transistor models,

sureCore is developing a suite of power-optimised, foundation IP including Standard Cells, SRAM, ROM and Register Files. Low power is a critical design criterion for the QC space as power consumption translates to unwelcome heating effects which places additional cooling burdens on the cryostat.


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