Codasip to design EU-funded RISC-V processor
Codasip has announced its selection to provide a general-purpose, high-end processor for the large-scale European supercomputing project, Digital Autonomy with RISC-V in Europe (DARE).
With funding from the project and a fully Europe-based development team, Codasip will design a RISC-V-based General-Purpose Processor (GPP) that can be configured and customised for a range of HPC-class applications.
DARE aims to build a supercomputing stack, featuring high-performance and energy-efficient RISC-V-based processors and accelerators designed and developed in Europe. The European Union has committed 240 million in funding for the first three-year programme phase. The selected partners will leverage hardware/software co-design to achieve competitive performance and efficiency.
Currently, Codasip’s product portfolio encompasses a range from 32-bit low-power embedded cores to 64-bit application core families, featuring optional safety and security capabilities, including the advanced memory protection technology CHERI. The company provides extensive opportunities for hardware/software co-optimisation and application-specific customisation, thanks to the highly automated processor design toolset, Codasip Studio. Through the DARE project, Codasip will complete its product portfolio with offerings for high-end applications, including AI, big data processing, and supercomputing.
Karel Masarik, Codasip’s Founder and Chief Innovation Officer, stated: “The development efficiency of our Custom Compute offering means we can do more with less compared to less powerful legacy approaches. The EU sees the value of our technology in strengthening the European semiconductor industry. “Through DARE and other initiatives, we also gain access to a European network of companies collaborating on cutting-edge new technologies.”
Digital Autonomy with RISC-V in Europe (DARE) has received funding from the European High-Performance Computing Joint Undertaking (JU).
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