Configurable analog IP wins slots in IoT wireless transceivers
Agile Analog automates the design and delivery of analog IP for integrated circuits. The company’s approach produces analog IP that is customised to the application’s requirements and is available on any semiconductor process. Agile Analog claims its design technology is programmatic, systematic and repeatable, leading to analog IP products that are more verifiable, more robust and more reliable.
Palma Ceia SemiDesign is a provider of communication IP and chips for WiFi HaLow and cellular NB-IoT applications. The data converter and power management IP is set to be used in its next-generation WiFi (802.11ah and 802.11ax) and cellular IoT products.
Configurable ADCs and DACs will be used by Palma within transceivers and within on-chip monitoring and built-in-self-test (BIST). Low-voltage drop out regulators (LDOs) are used to integrate power supply management functionality. The LDO design can be customized for multiple load currents to facilitate system design while maintaining low quiescent current to improve overall efficiency.
“The IoT and cellular markets are key industry growth areas with demanding requirements and an increasing need for customisation. Using Agile Analog’s IP has enabled Palma Ceia SemiDesign to focus their internal resources on more differentiating factors of their world-class transceivers without sacrificing overall quality and performance,” said Tim Ramsdale, CEO at Agile Analog, in a statement.
Roy Jewell, CEO at Palma Ceia SemiDesign, commented: “We’re impressed with Agile Analog – the outstanding quality of their automatically generated analog IP makes it truly easy to integrate and use. Add to this an innovative team we know well, that has extensive experience with complex SoCs and you have a winning combination, both for products as well as service and support.”
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