Configurable computing platform solves car computing dillemma

Configurable computing platform solves car computing dillemma

Technology News |
By Christoph Hammerschmidt

The higher the level of autonomous driving, the more sensors and communication devices the vehicles need. This leads to an explosive increase in the amount of data to be processed. Because this electronic perception of the environment is a very time-critical matter, this data must also be processed without any delay. The complexity of acquisition and control tasks also requires the extensive use of artificial intelligence. In addition, the automotive industry is currently undergoing a phase of restructuring: Car manufacturers are increasingly converting their vehicles into platforms for providing digital services. This wealth of tasks can no longer be accomplished with conventional processor-based architectures, and even heterogeneous architectures with multiple different hardware accelerators often reach the limits of what is feasible – also because of their lack of flexibility in adapting to differently structured processing tasks. Adaptive platforms are needed.

This is one of the driving forces for Xilinx to develop a computing and signal processing architecture that is no longer subject to these limitations. More than a year ago, Xilinx CEO Victor Peng announced this architecture, now the first chips are available. Under the name “Adaptive Compute Acceleration Platform” (ACAP), the company is breaking new ground in the provisioning and configuration of chip-level computing resources, with the ACAP approach going far beyond the FPGAs and SoCs it has offered hitherto. ACAP is a highly integrated heterogeneous multi-core computing platform that can be flexibly modified at both the hardware and software levels (Fig.1).

Fig.1: Basic architecture of the ACAP platform (C) Xilinx

The ACAP architecture is not only suitable for the kind of tasks that occur in the automotive sector. Rather, it can also be used in other segments such as data centers, 5G mobile communications or robot controls. However, the automotive industry plays a particularly important role for Xilinx, as Senior Automotive Director Willard Tu explains. Car manufacturers are increasingly opting for computing solutions from Xilinx; the number of vehicle models in which the Californian company’s hardware is installed is continuously increasing: in 2014, FPGAs and SoCs from Xilinx were found in 29 different vehicle models from 14 manufacturers, by 2018 there were 111 models from 29 manufacturers. Almost all OEMs and Tier Ones in the automotive industry are now Xilinx customers.

The new ACAP product family Versal is designed to simplify and accelerate the development of automotive electronics. To this end, it combines a standard-oriented approach with high quantities and thus enables cost optimization, promises Tu.

But what exactly does such a chip contain, what is hidden in the housing with its many hundreds of connector pins? Depending on the version, these chips contain one or more dual-core processors from ARM’s Cortex-A72 and Cortex-R5 series. In addition, there are up to 1900 floating-point DSP engines optimized for low-latency real-time tasks and up to 400 AI inference engines. The whole thing is garnished with a large block of programmable logic comprising around 1.9 million cells, as well as various memory blocks and interfaces for Ethernet, PCIe, MIPI and much more. Tu promises that the almost delay-free computing power will far exceed all previous arrangements of CPUs and GPUs. And the ACAPs are not supposed to outdo the established competition in terms of raw horsepower, but also in terms of flexibility: The different phases of driving place very different demands on the provision of computing power to the installed computers. When driving semi-automatically on the motorway, for example, other sensors are active than when parking. The ACAP architecture can combine these different requirements in a single chip – for this purpose, the configuration can be dynamically modified (see fig.2). Xilinx calls this feature Dynamic Function Exchange (DFX).

Fig. 2: Functions can be swapped dynamically (C) Xilinx


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