Coreless organic interposer for chiplets
Toppan has developed a high-reliability coreless organic interposer for next-generation semiconductors including chiplet designs.
The coreless organic interposer uses a material with a low coefficient of thermal expansion (CTE) to reinforce both sides of the redistribution layer (RDL) and providing rigidity for electrical test.
The organic interposer has both sides of the RDL reinforced with a low CTE material. The simple coreless structure supports fine pitch interconnections and a low thermal expansion, which is vital for reliable interconnect.
The CTE is approximately 45% lower than conventional packaging substrates, making it possible to prevent cracks that arise due to differences between the CTEs of FC-BGA substrates and RDLs.
This means the simple coreless structure can be independent from the carrier, delivering the world’s first organic interposer that can be used with standalone electrical inspection. This boosts the reliability, reducing financial losses that come from having to dispose of chips and chiplets if there are defects in the interposer.
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Heterogeneous integration, in which multiple different types of chips are integrated on an interposer, is widely used to enhance semiconductor performance. Silicon interposers are currently the predominant type, but due to cost considerations, growth in semiconductor packaging adopting organic interposers is expected in the future.
However, general organic interposers have poor structural rigidity, and standalone handling is difficult. This mean that they need to be fixed to a carrier or the like for electrical inspection, and the inability to confirm conduction on both the front and rear sides in such a state has presented a challenge.
Separating the interposer from the carrier during the manufacturing process makes standalone electrical inspection assurance possible, enhancing reliability and enabling supply as a known-good substrate.
The narrow pitch mold resin through-mold via (TMV) structure enables fine routing/fine interconnection with a minimum connection terminal pitch of 40μm (conventionally 130μm) on the chip side and 130μm (conventionally 300μm) on the substrate side.
Using an organic substrate taps into the scalability of panel level manufacturing so that large sizes of more than 100 mm sq. can be supported.
TOPPAN is aiming for its new product to be adopted for organic interposers and semiconductor packaging substrates for applications such as data centre CPUs and AI accelerators. These are currently restricted by the availability of silicon interposer capacity.
Samples of next-generation semiconductor-packaging-related products including the new structure will be available from 2027, with the launch of mass production scheduled for 2028.
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