Custom designed wireless links: what the 2012 VLSI Symposia had on offer
A team of researchers from the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley, presented a 260 GHz fully integrated CMOS transceiver for wireless chip-to-chip communication. Designed in 65 nm CMOS, the OOK modulation (On/Off Key) transceiver was demonstrated to transmit 10 Gb/s over a range of 40 mm.
The Tx/Rx dual on-chip antenna array is implemented with half-width leaky wave antennas. Each transmitter consists of a quadrupler driven by a class-D-1 PA with a distributed OOK modulator, and outputs +5 dBm of EIRP. The receiver uses a double balanced mixer to down-convert to a Vband IF signal that is amplified with a wideband IF driver and demodulated on-chip.
Another team from the same department presented a 65 nm CMOS-integrated wireless neural sensor with a footprint of 0.125 mm2 for minimally invasive surgery, drawing only 10.5 μW.
This brain-machine interface consists of an array of electrodes that extend vertically to reach relevant neurons, the wirelessly powered 65 nm CMOS IC integrating four 1.5 μW amplifiers (6.5 μVrms input-referred noise for a 10 kHz bandwidth) with power conditioning and communication circuitry, and an inductive coupling receiver (RX) coil placed on top of the active circuitry to minimize the device’s total footprint.
wireless neural sensor.
This neural sensor is claimed to be able to record action potentials with enough resolution to control a complex robotic prothesis. Data is then transmitted through the brain’s dura to a subcutaneous interrogator.
The four 10-bit, 20 kHz ADCs generate 800 kbps of neural data, which is backscattered after each sample is taken. The interrogator initiates sampling and communication by sending a 20 kHz beacon.
A paper from the Keio University, Japan, disclosed the use of inductive coupling, dubbed ThruChip Interface (TCI) for inter-chip communication. In effect, the idea is to use near-field wireless connections between different 3D-chip levels, instead of silicon vias. Designed as part of the digital CMOS circuit integration, this solution is claimed to be less expensive than using through silicon vias (TSVs) while offering similar bandwidth. The researchers listed various issues with TSVs, including their excessive footprint or the open failures they cause due to thermal stress. They looked at near-field communication at 50 GHz in the 1 mm range.
The ThruChip Interface is described as being surge-tolerant, thermally resilient, while imposing no restrictions on the circuit position within multi-layer stacks. This multi-layer interconnection is said to require only 3% of the footprint of conventional CMOS I/Os. It was tested with stacks of 128 dies, supporting a data rate per coil of 11 Gb/s/ch and aggregating a data rate of 8 Tb/s by arranging 1000 channels within 6.4mm2 while drawing two orders of magnitude less power than conventional high-speed memory links such as DDR.
This inter-chip, intra-stack communication technology could find use not only in large memory stacks that make up solid-state drives but also for multiple processor packages or for non-contact wafer-level testing as well as for debugging by probing internal bus data wirelessly through a device’s package.
A student in the Department of Electrical Engineering at the National Tsing Hua University in Taiwan, Chang-Ming Lai presented an ultra-wideband (UWB) impulse radio timed-array radar implemented in 0.18 μm CMOS technology.
Using a time-shifted direct-sampling architecture, the 4-channel transmitter array generates and sends a variety of 10GS/s pulses towards targets while the receiver array samples the reflected signal in RF domain directly by time interleaved sampling at 20 GS/s. The radar system can determine time of arrival (TOA) and direction of arrival (DOA) through time-shifted sampling edges which are generated by on-chip digital-to-time converters (DTC).
According to the student, the proposed architecture has range and azimuth resolution of 0.75 cm and 3 degree respectively — see figure 4.
This UWB impulse radio timed-array radar system can identify multiple targets by measuring simultaneously both direction of arrival (DOA) and time of arrival (TOA) of the radio waves scattered by several objects.
What’s more, for high-fidelity detection, the scattering waveform of UWB pulses from the radio interaction between the radar and the detected objects can be reconstructed through the analogue signal processing array (ASP) of the radar receiver.