Customizable eFPGA core on GF 12LP process
QuickLogic has developed an embedded FPGA core that can be used on the 12nm low power process from GlobalFoundries (GF).
The eFPGA standard cell implementation was created by QuickLogic’s open source Australis IP Generator tool and gives ASIC and SoC chip designers more flexibility in adding programmable logic to their devices.
The GF 12nm eFPGA core is aimed at applications such as 5G infrastructure, automotive electronics, aerospace and Defense as well as AI/ML acceleration and Internet of Things (IoT) devices, allowing system designers to add their own hardware algorithms to a chip. The eFPGA core can be added as part of a single chip or as a chiplet.
- QuickLogic, YorChip to develop FPGA chiplets
- GF adds 40nm CMOS, 130nm BCD processes for automotive
- RFSOI boost for mobile and 5G on 300mm wafers
QuickLogic has already developed eFPGA cores for the GF 65nm, 40nm and 22FDX process technologies as well as TSMC’s 65nm, 40nm, 22nm and 16nm processes, Samsung’s 28nm FD-SOI, UMC’s 22nm and the 130nm process from SkyWater Technologies.
The GF 12nm LP eFPGA core provides the highest density implementation of the technology.
“The Australis IP Generator is a game-changer for engineers who need to quickly and easily customize eFPGAs for their SoC designs,” said Mao Wang, senior director of product marketing. “With the Australis IP Generator, engineers can create custom SoC designs in weeks, not months, giving them a competitive edge in the market.”
The GF 12nm LP eFPGA Core, powered by QuickLogic’s Australis IP Generator, is now available for purchase.
www.quicklogic.com; www.gf.com
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