Data acquisition IC designed for vehicle radar systems
Each of the four channels contains a low-noise amplifier (LNA), a programmable-gain amplifier (PGA), an equaliser, a multibit signma-delta (Σ-Δ) ADC, and a decimation filter. The front-end circuitry allows direct connection to microwave mixer output with few external passive components, eliminating the need for a high-order antialiasing filter, driver op amps, and bipolar supplies, and providing precise channel-to-channel drift matching.
The on-chip phase-locked loop (PLL) allows a range of clock frequencies for system flexibility. The ADC can be synchronised with an external ramp for FSK-FMCW radar applications. It supports serial and parallel interfaces at programmable sample rates from 300 ksamples/sec to 1.8 Msmples/sec, as well as simple connections to digital signal processors and microcontrollers.
Operating on 1.8-V and 3.3-V supplies, the ADAR7251 dissipates 400 mW at 1.2 Msamples/sec and 5 mW in power-down mode. Available in a 48-lead LFCSP package, it is specified from –40°C to +125°C and priced at $9.00 (1000).
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