DDR4 memory handling on Xilinx FPGAs
The company’s UltraScale devices support massive I/O and memory bandwidth with power and latency reduction. The new DDR4 memory interface in UltraScale devices provides more than 1 Tb/sec of memory bandwidth to handle the data flow, fast processing, and memory requirements of leading-edge, next-generation system designs in key applications such as video imaging and processing, traffic management, and high-performance computing. Applications will see a reduction in read latency by 30% and significant power savings at the same data rate by going from a DDR3 to DDR4 interface. Users can also realise a 30% improvement in data rate while benefiting from a 20% reduction in power when moving from DDR3 at 1866 Mb/sec to DDR4 at 2400 Mb/sec.
These DDR4 memory interfaces are tested over stressful system conditions such as varying voltage and temperature, system-induced jitter, and with difficult data patterns, to ensure operating margin for real system deployment. Compliant with the JESD79-4 DDR4 SDRAM standard, Xilinx’s SelectIO interface helps ensure the greatest timing margin. To guarantee optimal signal integrity, the I/O technology includes transmit pre-emphasis, receive equalisation, low jitter clocks, and noise isolation design techniques.
UltraScale devices with DDR4 memory interfaces are available now. Watch a video demonstration of a DDR4 memory interface running at 2400 Mb/s using mid-speed grade silicon and Micron 4Gb devices at www.xilinx.com/memory
Xilinx; www.xilinx.com
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