Debug probe supports Infineon’s single-pin debug Interface
“Support for Infineon’s SPD-interface makes J-Link even more versatile”, according to Segger, “We are making sure our complete line of J-Link debug probes support all major tool vendors, CPU architectures and target interfaces [and] the first vendor supporting Infineon’s XMC1000 series singlewire debug interface is just one more point of proof”.
“The SEGGER support for the SPD-interface significantly improves the eco-system for the XMC1000-series. By working with SEGGER, the SPD-interface is now accessible from all popular tool-chains in the market, including the free DAVE™ development platform and other free GDB-based development environments,” says Dr. Stephan Zizala, Senior Director, Industrial and Multimarket Microcontrollers at Infineon Technologies.
The SEGGER J-Link debug probe on the market is tool chain independent and works with commercial IDEs from: Atmel, Atollic, Coocox, Freescale, IAR, i-Systems, ImageCraft, KEIL, Mentor Graphics, Phyton, Rowley, Renesas, Tasking and others, as well as free GDB-based tool chains such as emIDE and EmBlocks. J-Link supports multiple CPU families, such as ARM 7, 9, 11, Cortex-M0, M0+, M1, M3, M4, R4, A5, A8, A9 as well as Renesas RX610, 620, 62N, 62T, 630, 631, 63N; there is typically no need to buy a new J-Link or new license when switching to a different CPU family or toolchain.
Segger; www.segger.com/jlink.html
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