Debugging High-Performance Designs with Mixed Signal Oscilloscopes

Technology News | February 1, 2014

By eeNews Europe

These are real world functional examples of how engineers have used the Tektronix MSO70000 Performance Mixed Signal Oscilloscope, to solve problems. The examples shared in this article are not an exhaustive list of the tasks one could perform with the MSO70000, but represent some of the many advantages of having a Mixed Signal Oscilloscope for engineers involved in development work.

Figure 1.1 DDR3 Read Burst

Application Area: Memory

An MSO70000 Series Performance MSO allows engineers to probe more signals on the DDR bus and to trigger on and view specific bus events. Up to 16 digital channels can be used to view logic states of command & address signals such as RAS, CAS, WE, CE, and CS.

In addition, the 4 analog channels are available for the MSO70000 to understand the signal integrity of the Clock, Data and Strobe signals of a memory system.

Signal integrity of the 16 inputs can be analyzed using the iCapture™ multiplexing feature, which allows any of the digital input signals to be internally routed to one of the scope’s four analog channels. Events such as initialization, power state changes, and command-bus cycle timing can also be analyzed using the bus-decoding features of the MSO.

Using a combination of the analog and digital channels, in conjunction with DPOJET and the DDRA application makes this a complete, well-rounded solution.

Figure 1.2 DDR Write Burst

Why use MSO?

The digital channels on the MSO are used in DDR applications to:

Verify read and write status of the data lines

Determine when valid data is on the line

Previously, the scope had to use complicated algorithms, and advanced search and mark to find waveform characteristics and phase relationships that indicated when a read or write cycle was occurring.

This approach was prone to issues because the JEDEC specification was very loose on the signal characteristics that defined Read and Write cycles. Some engineers experienced situations where a DUT was within specification, but internal algorithms did not catch the cycle correctly. Using the digital channels, one can easily determine when valid data is on the line and whether it is a read or a write.

Who can benefit from MSO70000 for Memory?

Memory Controller Developers

Semiconductor Manufacturers

PC Manufacturers

Figure 2.1. Overflow error present on digital decode bus

Application Area: High Speed Serial PCI Express

PCI Express offers an opportunity to use the MSO70000 Series to have added visibility of low speed control bus signals that give designers information on the status of the high speed analog serial bus lane traffic.

PCI Express transmitter/receiver pairs often include not only a serial link, but also a built-in “debug port.” This parallel output delivers real-time data summarizing the transactions occurring within the device.

With debug ports on both the transmitter and the receiver, developers can monitor the health of the transmission link and localize many types of problems to either the Transmit or the Receive side.

Figure 2.2 PCI Express State Machine

Why Use MSO?

With a built-in debug port, the state of the PCIe core can be monitored and used for triggering. The scope screenshot in Figure 2.1 shows an acquisition taken from a PCI Express serial link.

In this application example, an error on the bus has caused the MSO to trigger on a bus violation.

Because of the good signal quality, a design engineer can visually tell the problem does not stem from an underlying analog problem. The finding strongly implies a digitally-based issue deriving from a timing problem or other digital conflicts.

Using an MSO70000 enables the engineer to show a power supply noise coupling issue inducing noise on the DDR memory bus. Right before the FPGA state machine put the PCIe link into an idle state, a memory Read request was issued. Switching noise on one of the supply lines caused some memory setup and hold violations, which were made visible by the MSO. This in turn prevented the FPGA memory controller from properly latching the data. See Figure 2.3.

When faults occur in FPGA based designs, the MSO70000 Series can help see analog events such as the input and output signals and power supply lines in addition to the digital lines that show the internal status of the FPGA logic. Potential problems that can be debugged include:

Situations that were not accounted for in simulation, e.g. a power supply issue

Cross-talk between high speed lines caused by a stronger line driver affecting an adjacent line that only occur when a set of drivers turn on together

State machine logic errors, unlocked phase locked loops, and FIFO overruns

The sequence of errors that led up to the PCI Express state machine error can be seen in Figure 2.3.

Figure 2.3 Sequence of events leading to overflow state.

1. Power supply noise coupled to memory bus

2. Memory read issues occur

3. Unexpected data sent to FPGA results in overflow state

Who can benefit from MSO70000 for High Speed Serial?

PHY Design and Validation Engineers

Motherboard Designers

Figure 2.4 TIE plot shows correlation with the glitch on the DDC bus.

Application Area: High Speed Serial HDMI Video System

The MSO70000 Series can be used to troubleshoot display issues in high-speed serial video systems. The digital view of the Data Display Channel bus, in concert with the analog view of the digital channels can help engineers sort out difficult design issues.

As in the PCI Express example in Figure 2.4, video systems also have low speed serial busses that control low level operations within the system. In HDMI, there is a bus called the Data Display Channel (DDC), this bus is used for display configuration such as resolution settings and color configuration and uses the I2C protocol for communication.

Why Use MSO?

In this design example, the engineer has an HDMI video system that has intermittent, or no display. The HDMI physical layer testing passes, but there is still something wrong with the display.

Using the MSO70000, the engineer, was able to look at the analog lanes of the HDMI signal, while viewing the DDC bus and decoding the traffic on it. The engineer discovered that the DDC line was writing display information to the wrong address.

Using a trend analysis of the data, it was found in this example that the DDC line was writing the wrong address because the edge rates of the data were too fast. As a result of these findings, engineers uncovered an issue with the cable shielding on the HDMI cable. Shielding was improved, and the driver for the data was slowed to remedy the edge rate issues.

Who can benefit from MSO70000 for HDMI Testing?

Graphics chip vendors

Display Manufacturers

Cellphone Manufacturers

Application Area: Software Defined Radio

Figure 3.1 Sequence of events leading to overflow state.

Application Area: RF Software Defined Radio

The MSO70000 Series software radio is a radio whose channel modulation waveforms are defined in software. That is, waveforms are generated as sampled digital signals, converted from digital to analog via a wideband DAC and then possibly up-converted from IF to RF. The receiver, similarly, employs a wideband Analog to Digital Converter (ADC) that captures all of the channels of the software radio node. The receiver then extracts, down-converts, and demodulates the channel waveform using software on a general purpose processor.

Why Use MSO?

For this application, the MSO70000 Series, using its 16 digital channels, has a logic trigger that is set to catch an illegal state value to the input of the Digital-to-Analog Converter (DAC). The logic trigger for an all “1” state value (0x3F) triggers the acquisition. The correlated view of the analog signal is shown somewhat delayed in time, about 34 ns (see Figure 3.1). This represents the absolute delay in the DAC conversion process of this high-speed device. This analysis enables the correlation of the logic state to the voltage spike appearing on the analog channel.

Figure 3.2 Sequence of events leading to overflow state.

The time domain view of the analog performance may not give us the complete view of the impact this might have on our software radio design, so further correlated analysis of the RF performance is required.

To assess the RF performance of the signal on the same acquisition, Tektronix SignalVu software, running directly on the MSO70000 Series can be used directly on the same data set (see Figure 3.2). The screenshot on the right shows RF analysis on the same data set acquired for image on the left. The logic state trigger has been used to trigger the data set and the SignalVu analysis performs the RF analysis.

In this example, Discrete Fourier Transforms (DFTs) are performed to show the Spectrogram and Spectrum frequency domain analysis, and time sampled data is displayed as RF I&Q vs. Time and Amplitude vs. Time. Time correlated markers have been turned on to demonstrate the time-correlation of the RF analysis for different views. It can clearly be seen that the illegal state values triggered at the DAC using the digital channels of the MSO70000, resulted in a spectral regrowth.

Who can benefit from MSO70000 for RF?