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Dolphin Integration offers uprated, 8051-architecture IP core for SoCs

Dolphin Integration offers uprated, 8051-architecture IP core for SoCs

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By eeNews Europe



This new microcontroller core based on a reduced instruction set (RISC) offers the possibility to:

– Select a 32-bit core adapted to the application performance requirements with ultra high code density and very low power consumption

– Optimise the MCU subsystem thanks to SmartVision (integrated development environment) which allows you to model and import descriptions of peripherals for a complete subsystem simulation of the application software with its peripherals

Zephyr features the ability to add a low power cache controller, R-Stratus-LP, to improve flash memory access time and drastically reduce power consumption.

Dolphin Integration; www.dolphin-ip.com

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