Dual-core MCU range offers highest performance and rich features
The new devices are based around a 480MHz version of the Cortex-M7 and add a 240MHz Cortex-M4 core. ST’s smart architecture combined with efficient L1 cache, and an adaptive real-time ART Accelerator allow the MCUs to set new speed records at 1327 DMIPS and 3224 CoreMark executing from embedded Flash. ST’s Chrom-ART Accelerator also provides an extra boost to graphics performance. Each core operates in its own power domain and can be turned off individually when not needed.
STM32H7 MCUs come with pre-installed keys and native secure services including Secure Firmware Install (SFI). SFI allows the encrypted firmware to be delivered to an external programming company anywhere in the world without exposing unencrypted code. Built-in support for Secure Boot and Secure Firmware Update (SB-SFU) protects OTA upgrades and patches.
STM32H7 MCUs feature up to 2MByte Flash and 1Mbyte SRAM on-chip to better handle real-time performance or AI-processing requirements. To extend memory capabilities, the Cortex-M7 level 1 cache and parallel and serial memory interfaces offer unlimited and fast access.
The devices also offer advanced features include ECC for all Flash and RAM memory, multiple advanced 16-bit ADCs, external ambient-temperature range up to 125°C, an Ethernet controller and multiple FD-CAN controllers, and ST’s latest high-resolution timer.
ST’s STM32Cube ecosystem has been extended by adding STM32CubeH7 firmware modules with application source code, including graphical solutions based on TouchGFX and STemWin graphical-stack library. The company has also launched new Evaluation, Discovery, and Nucleo boards for the series. Developers can take advantage of all the standard elements of the STM32Cube development environment, including the ST-MC-SUITE motor-control toolkit, STM32Cube.AI machine-learning toolkit, STM32CubeMX, STM32CubeProgrammer, and certified partner solutions for STM32.
More information
www.st.com/stm32h7
STM32H7: First Dual Core Version, More Accessible Single Core Models
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