Dual core processor adds C extensions, looks to Rust
Swedish processor design pioneer Imsys is launching a dual core embedded processor and software stack that enables developers to add custom C instructions or even run the Rust language natively.
The IM4000 processor core is being implemented in a Xilinx/AMD FPGA and in the 22nm process at GlobalFoundries and is aimed at upscale white goods, automotive and battery powered smart sensor applications.
“The aim is to get it out in different formats and get feedback from potential customers,” Jonas Wærn, CEO of Stockholm-based Imsys tells eenews Europe. “We are proud of our hardware but the first implementation is the software stack running on the IM3000. That’s where we can future proof our customers,” he said.
He took over at Imsys last year to reboot the company, which has been a pioneer in the design of processors for forty years.
“The stack and tools are completely new with a [Clang] LLVM compiler and C instruction set,” says CTO Dag Helmfrid. “The tools in are built Visual Studio for a cross compiler with symbolic debug.”
The Imsys software stack running on the previous IM3000 single core
“The two cores are to a large extent built on the IM3000 and share a memory and microcode memory so it’s more area efficient. The instruction set and stack is backwards compatible with the single core processors,” he said. The cores are functionally compatible so the complete stack will run from microcode.
The cores run the FreeRTOS real time operating system so can distribute an application into each of the cores and signal each other through the memory interface. There is also an octo SPI interface to memory to reduce the pin count.
As well as running Java through the Imsys High Efficiency Programming Interface (IHEPI) the design could also easily be updated to run the Rust language says Helmfrid.
IP is one of the options for distributing the design and Imsys is also working with a strategic customer on a chip as well as the FPGA implementation.
“The FPGA is up and running and being tested mainly on the memory,” said Helmfrid. “We have a wrapper around the memory with one wrapper for the FPGA and also on the process of synthesising the core on the 22nm GF process. Our target frequency will be about 700MHz and we are looking at the longest signal paths to tweak it to 1GHz in the next three weeks or so.”
The frequency is less of an issue as the design is focussed on higher energy efficiency. The 22nm process has a low quiescent current and provides voltage scaling that can reduce the voltage to save power. Spreading an application across the two cores can reduce the frequency further to save power.
Another efficiency comes from the extensions.
“We have flexibility in the microcode for custom instructions. This could be hardware such as bit bashing or optimisation of certain functions such as FFT or encryption functions. The customer can also use this to update the firmware and move code to microcode,” he said.
“You can do it in two ways – you can use extensions and cater for that in the tool chain or view as special instructions as an in-line function call which the customer can do as a unique feature without our help and implement that in microcode.
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