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Dual MOSFET increases the efficiency of smartphone and tablet battery charging

Dual MOSFET increases the efficiency of smartphone and tablet battery charging

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By eeNews Europe



As the battery capacity of mobile devices increases, there is a need for devices that support increased charging currents and frequencies to keep charging times to a minimum. The SSM6N58NU meets these needs with a maximum DC drain current (ID) of 4 A and maximum pulsed drain current (IDP) of 10 A. Furthermore, because the gate charge and capacitance of the MOSFET is reduced, fast switching is supported.

The N-channel MOSFET ensures efficiency and switching speeds through a design that minimizes ON resistance (RDS(ON)) and input capacitance (CISS). Input capacitance is as low as 129 pF, while RDS(ON) measures 67 mΩ at  VGS=4.5 V. This enables low loss and high speed operation with a turn-on time (ton) of 26ns, and a turn-off time (toff) of 9 ns. The low gate charge of Qg=1.8nC (@ ID=4 A) reduces the AC dissipation at 3 MHz enabling usage in DC converter applications. Independent MOSFET configuration and high ESD protection levels of ≥2 kV also enables usage in battery protection circuits.

The SSM6N58NU is supplied in a UDFN6 surface mount that requires 2 mm by 2 mm of board space with a body height of 0.75 mm. Due to the flat body of the structure, this package offers a power dissipation of 2 W and can withstand channel temperatures up to 150°C.

Visit Toshiba at www.toshiba-components.com

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