DVCon Europe 2015 announces Preliminary Technical Program
Sponsored by Accellera Systems Initiative, DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design.
The event’s organisers have announced that the Preliminary Technical Program is now available, covering the following themes:
· System Level Design & Verification
· Advanced Verification & Validation
· Design for Functional Safety
· IP Reuse and Design Automation
· Analog and Mixed-Signal Design & Verification
· Lower Power Techniques
DVCon Europe has selected high quality papers, tutorials and posters around best practices and user experiences on design and verification in SystemC, SystemVerilog, PSL, UVM, UPF, IP-XACT, and more.
The Highlights of DVCon Europe 2015 are:
· 15 tutorials moderated by user companies, tool providers and training partners
· Technical program that will comprise 36 papers
· Multiple tracks presenting 26 papers and a poster session hosting 10 posters
· Exhibition with demonstrations from training partners, design tool and IP service providers
· Gala Dinner included as part of the conference
And “Early bird” registration discount is available until October 1st, 2015. Registration is sponsored by Mentor Graphics. Register today at: www.dvcon-europe.org/registration
DVCon Europe 2015 takes place on Wednesday November 11th and Thursday November 12th, 2015, at the Holiday Inn Munich City Centre, Hochstrasse 3, 81669 Munich, Germany. There are special hotel rates for conference attendees.
Accellera Systems Initiative (Accellera) is an independent, not-for profit organisation, dedicated to create, support, promote and advance system-level design, modelling and verification standards for use by the worldwide electronics industry. The organisation accelerates standards development and as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardisation. The organisation’s sponsors are; ARM, Cadence, Intel, Mentor Graphics, and Synopsys.
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