DVCon Europe readies for first presentation, Munich, mid-October
Sponsored by the Accellera Systems Initiative, DVCon Europe brings chip architects, systems designers, software developers and IP integrators the latest methodologies, techniques, applications and demonstrations on the practical use of EDA and IP languages and standards used in electronic design. Sponsors of the non-profit Accellera Systems Initiative are ARM, Cadence, Mentor Graphics, and Synopsys.
The Technical Program for the conference covers the following themes:
System Level Design
Verification & Validation
IP Reuse and Design Automation
Mixed-Signal Design and Verification
Lower Power Design and Verification
DVCon Europe has selected papers, tutorials and posters around best practices and user experiences on design and verification in SystemC, SystemVerilog, PSL, UVM, UPF, IP-XACT, and more.
Highlights of DVCon Europe, say the organisers, are:
Industry Keynote Speaker: Bernd Adler from Intel Mobile Communications, Germany
14 tutorials moderated by user companies, tool providers and training partners
More than 25 technical paper presentations
Poster session hosting more than 15 posters
Exhibition with demos from training partners, design tool and IP service providers
DVConnect Networking Reception
The conference takes place on Tuesday, October 14 and Wednesday, October 15, 2014 at the City Hilton Hotel, Munich; registration is at; www.dvcon-europe.org/registration
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