E-beam litho enables secure chip partnership
The argument from the TrulyUniqueChips partnership is that when chips that are unique at the deepest hardware level then an attack on a single chip cannot be transposed to an entire population of chips. This in turn makes an attack on the single chip uneconomic.
The initiative is ready to use e-beam lithography, where no mask is required but a pattern is written direct from a computer database to an individual die, to vary gates and interconnects within each chip.
E-beam inserted into CMOS wafer flow. Source: TrulyUniqueChips.
Because of the length of time taken to expose the resist direct-write e-beam lithography has found almost no traction in the semiconductor industry until now. Mapper’s approach developed since the company was founded in 2000 is to use thousands of beamlets to simultaneously write to the die. To date interest in e-beam lithography has mainly been for applications where the time taken is not such an issue, such as the creation of masks for use in conventional optical immersion and potentially in extreme ultraviolet lithography.
However, the partnership has recognized that secure chips may be able to justify the use of e-beam lithography in production and has developed cryptographic cyphers that implements individualized encryption directly on the unique hardware. This can either be done as a separate security chip or as a small core to be included in a larger chip design.
The technology is intended to be integrated in standard volume chip manufacturing operations with low gate count requirements and at low cost. Conventional manufacturing processes can be used for the common functionality of the chips, while the custom areas are printed directly from a trusted database using multi e-beam direct write.
Next: Advantages but what about PUF?
The method is claimed to have a number of advantages including: prevention of chip cloning and reverse engineering; resistance to side-channel attacks through the use of Irdeto’s Clearbox algorithm and the use of an embedded cryptographic key.
That said, it is possible to make use of Physically Unclonable Functions (PUF) licensible from Intrinsic-ID to do some of these things (see Intrinsic-ID: Flexible Key Provisioning with SRAM PUF).
Mapper has been working with research institute Leti (Grenoble, France) and foundry TSMC for several years and this year Leti and Mapper are due to present three papers on massively parallel electron-beam lithography at the SPIE Advanced Lithography symposium coming up in San Jose.
The pair will present the invited paper “Performance validation of Mapper’s FLX-1200” on February 27 and the same day “Overlay and stitching metrology for massively parallel electron-beam lithography.” On March 1 they will present “Process development for the maskless N40 via layer for security application.”
Related links and articles:
News articles:
Maskless e-beam litho good for 14-nm
Intrinsic-ID: Flexible Key Provisioning with SRAM PUF
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