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eDP: the next rung on display control’s evolutionary ladder

eDP: the next rung on display control’s evolutionary ladder

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By eeNews Europe



While the CMOS interface reaches its limits regarding data rates relatively quickly, with dual-channel LVDS resolutions up to 2048×1536 (QXGA) at 60 Hz are possible. Even 10-bit color depth per color (RGB) are not a problem.

Theoretically, up to 10m cable length should be possible. In practice, however, at full HD resolutions and 60Hz, the potential cable length is 2m at most, depending on the line quality and the application. Sometimes even a cable length of more than 50cm causes EMC problems.

Since the display trend is towards ever higher resolutions and the lowest possible energy consumption, new interfaces had to be introduced. Right now everything points to 3 technologies, if one disregards the transitional solution 10-channel LVDS.

For small, portable displays used in consumer products such as smartphones and tablets, where long battery life is a top priority, MIPI (Mobile Industry Processor Interface) takes hold. However, this interface has hardly any significance in the industrial sector so far.

For digital signage, i.e. large displays sized 40 inches and up, the manufacturers mainly rely on V-by-One. The average sized TFT displays tend to utilize eDP, because especially in the notebook / ultrabook range the eDP interface is included in all current Intel and AMD chips. Beginning this year, eDP thereby officially replaces LVDS.

eDP is a VESA standard, which was released as version 1.0 in 2008. Unlike LVDS, it defines the pin assignment in addition to the transmission technology. The last expansion stage v1.4a dated February this year. Besides the transfer of graphics data with enormous data rates of up to 8.1 GBit/s per lane, which is sufficient even for 8k displays (7680×4320 pixel at 60Hz) eDP still offers a number of other advantages.

If supported by LCD and controller solution the so-called "Panel Self-Refresh" (PSR) in combination with the "Regional Backlight Control", which offers the partial dimming of the backlight, helps to save power. With "Panel Self Refresh" the LCD buffers nonmoving images via an integrated frame buffer and displays them, while the GPU goes into sleep mode.


Brand new in the 1.4a standard is the "Multi-SST Operation" (MSO). With this technique, the display is divided into segments which are controlled via its own data lane. The segments are driven by two or four controllers, of which only those whose image content is changing are active. Due to PSR the others are in sleep mode. According to VESA specifications this saves energy and prolongs the battery life.

Distec’s PrismaECO-eDP-controller board and LVDS2eDP interface board enable comfortable control of TFT displays with eDP interface.

 

Another interesting feature of eDP is the AUX channel. Thereby, for example, control signals are transmitted to the display (Display Panel Control Protocol) or a multi-touch is integrated directly. Then for the touchscreen no separate cable from the display to the control unit is required.

The current range of Distec’s intelligent eDP solutions includes the stand-alone controller board PrismaECO-eDP and the small LVDS2eDP interface coverter. Integrated in the customer’s existing design, the LVDS2eDP simply converts the existing LVDS interface to eDP. Thus the customer may keep his controller solution but still use one of the modern, sleek full-HD displays (eg. 12.5").

On a project basis Distec implements various special functions and custom hardware designs made in Germany. The engineers at Distec GmbH in Germering develop the hardware and firmware for professional display control. This enables them to react quickly and flexibly to customer requests and to find competent solutions even for challenging specifications.

About the author:

Matthias Keller is COO Components at Distec GmbH – www.distec.de

 

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