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Eight core RISC-V processor and TSN switch for AI space designs

Eight core RISC-V processor and TSN switch for AI space designs

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By Nick Flaherty



Microchip is qualifying an eight core fault tolerant RISC-V processor for AI in space applications.

The radiation tolerant PIC64-HSPC octal core 1.2GHz switch provides 26K DMIPS and is built on a 12nm FINFET process at GlobalFoundries in the US.

The PIC64-HSPC is the second member of the new 64bit RISC-V processor family from Microchip, but uses the X280 RISC-V cores from SiFive with vector extensions for machine learning and AI applications.

Microchip starts 64bit PIC64 family with RISC-V

The eight core device includes 240Gbit/s time sensitive networking (TSN) as well as CXL2.0 memory interconnect and RMAP-compatible SpaceWire ports with internal routers. A three level cache for the eight cores can provide up to 2TOPS of INT8 AI inference performance.

This is also the start of a new ecosystem for space design with over a dozen system and software partners to accelerate PIC64-HPSC adoption on Single-Board Computers (SBCs), space-grade companion components and a network of open-source and commercial software partners.

The radiation- and fault-tolerant PIC64-HPSC is being delivered to NASA and the broader defence and commercial aerospace industry for AI/ML applications. High fault-tolerance capabilities include Dual-Core Lockstep (DCLS) operation, WorldGuard hardware architecture for end-to-end partitioning and isolation and an on-board system controller for fault monitoring and mitigation.

“This is a giant leap forward in the advancement and modernization of the space avionics and payload technology ecosystem,” said Maher Fahmi, corporate vice president, Microchip Technology’s communications business unit. “The PIC64-HPSC family is a testament to Microchip’s longstanding spaceflight heritage and our commitment to providing solutions built on industry-leading technologies and a total systems approach to accelerate our customers’ development process.”

For the commercial space sector, the Radiation-Tolerant (RT) PIC64-HPSC RT is designed to meet the needs of Low Earth Orbit (LEO) constellations where system providers must prioritize low cost over longevity, while also providing the high fault tolerance that is vital for round-the-clock service reliability and the cybersecurity of space assets.

Flexible power tuning:  Includes dynamic controls to balance the computational demands required by the multiple phases of space missions with tailored activation of functions and interfaces. 

Radiation-Tolerant RISC-V FPGA for Linux in space

“Microchip’s PIC64-HPSC family replaces the purpose-built, obsolescence-prone solutions of the past with a high-performance and scalable space-grade compute processor platform supported by the company’s vibrant and growing development ecosystem,” said Kevin Kinsella, Architect for System Security Engineering with Northrop Grumman.

“This innovative and forward-looking architecture integrates the best of the past 40-plus years of processing technology advances. By uniquely addressing the three critical areas of reliability, safety and security, we fully expect the PIC64-HPSC to see widespread adoption in air, land and sea applications.”

The PIC64-HPSC MPUs will be supported by a comprehensive space-grade ecosystem and innovation engine that encompasses flight-capable, industry-standard SBCs. Early members in the ecosystem include: SiFive, Moog®, IDEAS-TEK, Ibeos, 3D PLUS, Micropac, Wind River, Linux Foundation, RTEMS, Xen, Lauterbach and Entrust.

Microchip will also offer a comprehensive PIC64-HPSC evaluation platform that incorporates the MPU, an expansion card and a variety of peripheral daughter cards. Samples will be available to Microchip’s early access partners in 2025.

PIC64-HPSC MPU ecosystem partners

 

 

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