Electro-photonic processor chip communicates directly by light

Electro-photonic processor chip communicates directly by light

Technology News |
By eeNews Europe

The development, described in a preview here, addresses the barriers presented to increasing bandwidths of inter-chip data communications by the physics of electrical signalling. Electrical SerDes interconnects have been extended far beyond what might once have been thought possible, but their limits may be in sight.

Optical solutions have been proposed for decades, but fabricating fully-integrated (monolithic) combinations of optical transceivers and current-generation logic has been challenging. Commercial suppliers such as the FPGA vendor Altera have proposed system-in-package solutions in which optical transceivers might be integrated as a separate die on a silicon substrate, tightly-coupled to logic dice (a.k.a. “2.5D integration”) but no (open-market) product has yet emerged.

One of the issues that has limited such developments is the need to integrate optical emitters on the same process as the dense and fast logic; as well as the very different semiconductor process requirement, there are thermal and power issues to be resolved. The team reporting their results in Nature circumvent (some of) these issues by not having the light generated on the integrated substrate. Externally-generated laser light illuminates the die and data is transmitted by capturing some of that light, modulating it, and coupling the modulated light into a fibre.

The demonstration described verifies the capabilities of the optical link by using two identical chips; each contains a dual-core RISC-V processor core, 850 optical transceivers, and 1 MB of memory – over 70 million transistors in total. The tests described ran code on the core of one IC, but using the memory of the other, connected by optical links. A single laser source, via a power splitter, illuminated the ring-modulator transmitter on each chip, and the modulated light (via an optical amplifier) was routed to a receiver on the alternate chip. On each IC, the processor cores and the memory array each have their own, dedicated, set of electro-optic transceiver sites. The complete IC is 3 x 6 mm in size.

In the test setup, fibre-positioners locate three (illumination/Rx/Tx) fibres over each chip. Fabrication using selective substrate removal enables controlled optical and electrical access to the Chip’s resources.

Memory tests, and graphical rendering programs demonstrate that the optical link operates at zero BER. One observation that the researchers note is the sensitivity of the ring modulator to its thermal operating point, keeping it aligned to the laser light’s wavelength; closed-loop on-chip heaters are required to stabilise the operating temperature and a shift of less than 1C is sufficient to cause transmission errors to appear.

The research group adds, “…Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic–photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.”

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