MENU

Eliyan gets 40Gbps/bump chiplets back from TSMC

Eliyan gets 40Gbps/bump chiplets back from TSMC

Technology News |
By Peter Clarke



Chiplet startup Eliyan Corp. (Santa Clara, Calif.) has received its first silicon in 5nm manufacturing process technology from foundry TSMC.

The chiplet implments the company’s NuLink PHY technology in support of multi-die architectures for compute-intensive applications.

The chip operates at 40Gbps/bump and delivers over 2.2Tbps/mm of bandwidth at 130micron bump pitch on standard organic packaging. NuLink PHY can deliver up to 3Tbps/mm once implemented on available standard packaging technologies at finer bump pitches.

The company said the ability to implement chiplet-based systems in standard organic packages enables the creation of larger system-in-package (SiP) solutions and higher performance per power at considerably lower cost and higher yield.

Eliyan’s NuLink technology eliminates the need for silicon interposers, the company claims.

Bunch of Wires

Eliyan’s chiplet interconnect technology is based on the Bunch of Wires (BoW) standard, which has already been adopted by the Open Compute Project, and is fundamentally compatible with the UCIe standardization efforts.  Eliyan is currently working with standards bodies to create an efficient universal die-to-die interconnect optimized for memory traffic to help accelerate the adoption of memory chiplets.

“First silicon . . . positions us as the front runner in enabling the most efficient chiplet interconnect in the semiconductor industry,” said Eliyan’s founding CEO Ramin Farjadrad, in a statement. “With a proven silicon implementation, chip developers will now be able to realize the full benefits of the multi-die architectures without constraints imposed by advanced packaging such as size limitations of silicon interposers. It also enables the practical mix and match of chiplets in different processes and foundries.”

John Lorenz, a senior analyst at Yole Intelligence, said: “Eliyan’s chiplet interconnect technology will make multi-die approaches more attractive to chip suppliers whose designs must optimize on power and bandwidth vectors. This is especially the case for those in accelerated server computing applications, a market mainly served by datacenter GPU hardware, and which we see sustaining a 22 percent unit growth CAGR through 2028.”

Silicon characterization data is now available. Eliyan is also in the process of porting its design to multiple foundry and node technologies based on early customer interest and demand.

Related links and articles:

www.eliyan.com

News articles:

Eliyan raises $40m to shake up chiplet interconnect

China forms its own chiplet standard amid isolation

Startup Chipletz selects Siemens EDA

Ayar Labs raises $130 million for optical chiplets

CEO interview: Alphawave IP’s Pialis on chiplets and custom silicon

If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News

Share:

Linked Articles
10s