Elpida, Powertech, UMC team on 3-D at 28-nm
The co-operation focuses on through-silicon-via (TSV) technology to establish a reliable approach to logic-plus-DRAM, the companies said.
UMC and PTI engineers have begun work at Elpida’s Hiroshima plant on the joint development of TSV products there. The companies said they would make use of the strengths of Elpida in DRAM, UMC in logic and PTI in assembly to develop logic-plus-DRAM components.
The collaboration includes works on logic-to-DRAM interface design, TSV formation, wafer thinning, testing and chip-stacking assembly for customers.
The companies did not state how the technology would be taken to market. However, the resulting technology is expected to reduce costs, improve logic yields, and accelerate entry into the 3-D IC market. The mention of logic yields and assembly for customers suggests that an extension of UMC’s foundry chip manufacture to include 3-D packaging could be one route to market.
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