Embedded process detector supports dynamic performance optimization
The Process Detector can be used to enable a continuous Dynamic Voltage & Frequency Scaling (DVFS) optimisation system, monitor manufacturing variations on and if required, across chip, gate delay measurements, critical path analysis, critical voltage analysis and also monitor silicon ‘ageing’.
According to Moortec Semiconductor, such on-chip Process, Voltage and Temperature (PVT) monitoring has become a vital factor in the design and performance optimisation of small-geometries including 40nm, or 28nm and FinFET designs.
Such monitors embedded within SoCs allow for greater dynamic performance optimization as sensing die temperature, detecting logic speed and monitoring voltage supply levels can be used intelligently to vary system clock frequencies and the voltage levels of supply domains.
A key aspect is that optimisation can be applied to each and every device, either during production or when devices are ‘in-the-field’.
Moortec also believes that strategies adopted by IC designers over the coming years will be heavily influenced through the analysis of data harvested from in-chip monitors during the life time of every device.
"The greater process variability that is apparent at these challenging small geometry CMOS technologies is forcing the IC design community to look at conditions on-chip, not just generally but also per device and within regions of a device," says Stephen Crosher, Managing Director of Moortec Semiconductor.
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