Enabling the highest rectifier efficiency and lowest standby power in flyback converters

Technology News | March 21, 2016

By Field Editor

EPS efficiency challenges

The global regulatory environment for external power supply (EPS) efficiency has rapidly evolved over the past decade since the California Energy Commission implemented the first mandatory standard in 2004. While many countries still have voluntary programs, the U.S. (Energy Independence and Security Act [EISA]-2007), China (National Resources Defense Council [NRDC]) and European Union (Code of Conduct [CoC] V4) now have mandatory EPS energy-efficiency regulations. Today, Level V performance meets or exceeds the requirements of any governing body around the globe. However, the next generation of EPSs that will enter the market will be significantly different from their immediate predecessors.

The driver behind these changes is the new Department of Energy (DOE) Level VI specification [1], effective February 2016 and mandating compliance for all covered EPSs manufactured in or imported into the United States. At the time of its adoption, Level VI will be the toughest mandatory EPS efficiency specification anywhere in the world.

The Level VI standard will affect a wide variety of EPSs used in consumer applications and tighten their minimum average efficiency during active mode (25-100 percent load) and maximum-input power consumption during standby mode. Standby power consumption must be limited to 100 mW for ≤49-W designs and 210 mW for >50-W designs. Although the European Union CoC V5 Tier-2 EPS specifications effective January 2016 are voluntary, they do go further than the mandatory DOE Level VI specifications by requiring higher efficiency, lower standby power and additionally specify minimum efficiency requirements at 10 percent load. As shown in Figure 1, a <25-W single output low-voltage (<6-V) EPS will be required to improve average efficiency by 4 percent or higher with respect to current Level V standards – a challenging task.

Figure 1: Four-point average efficiency requirements for low-output-voltage EPSs

In a conventional diode-rectified flyback converter, the output rectifier is a substantial power-loss contributor. The average current in the rectifier is equal to the DC output current, and the peak current can be several times higher, depending on the duty cycle of the converter. The forward-voltage drop of the rectifier is typically 0.5 V for Schottky diodes, which means that in a 5-V output converter, the rectifier diode alone can result in power loss of about 10 percent. You can implement synchronous rectification (SR) to boost efficiency and reduce heat by replacing the high-loss diode rectifier with an actively controlled MOSFET. With rapid advancements in low-voltage MOSFET technology, very low on-resistance (R_DSON) MOSFETs can reduce the forward drop in the rectifier to <50 mV, resulting in a tenfold improvement in losses.

The transition to SR seems imminent and inevitable for most designers trying to comply with the new regulations and ever-shrinking form factors for EPSs. However, the complexity, cost, limited compatibility with various converter operating modes and inability of existing SR controllers to extract maximum rectifier performance have in one way or another limited the wide adoption of SR. In this article, I’ll discuss the performance limitations of drain-to-source voltage (V_DS) sensing-based rectifier control and how a fundamentally different control principle can enable high-performance SR in flyback converters.

SR with V_DS sense control

SR controllers require intelligent sensing and accurate timing control to ensure optimal rectifier performance with current flowing only in the correct direction. SR MOSFET early or late turn offs lead to lower efficiency and overstress; the ideal SR controller determines the optimal conduction time of the MOSFET such that the body diode does not conduct any longer than necessary.

The majority of SR controllers today work on the principle of MOSFET V_DS sensing to determine the MOSFET turn-on and turn-off transitions. The fundamental limitation with this approach is the high dependence and sensitivity to MOSFET R_DSON. MOSFET turn on initiates once current flows through its body diode, which is sensed through a negative threshold, V_t2. When the MOSFET turns on, the device current is redirected to its channel and the V_DS voltage is reduced to I_DS*R_DSON; the MOSFET stays on until its V_DS reaches a second threshold, V_t1. V_t1 should ideally be zero to ensure that the MOSFET turns off when its current drops to zero; however, to accommodate integrated circuit (IC) temperature and manufacturing tolerances, this threshold is typically -5 to -10 mV or lower to ensure that it does not exceed zero and cause SR MOSFET overconduction.

When using low R_DSON SR MOSFETs for rectification to lower conduction losses, the V_t1 turn-off threshold is reached at a relatively high level of device current, as shown in Figure 2. Printed circuit board (PCB) layout, MOSFET package parasitics and noise can further corrupt the sensed voltage and result in early turn off. Following MOSFET turn off, the device current transitions back to its parasitic body diode; the higher voltage drop results in higher losses for the remainder of the switching cycle, resulting in underutilization of the MOSFET. To overcome this efficiency loss, designers must add a Schottky diode in parallel with the SR MOSFET to ensure that the body diode never conducts – thereby increasing the overall cost to implement SR.

Figure 2: SR early turn off with V_DS sense control

Another major challenge for designers implementing SR is to accommodate converter operation in continuous conduction mode (CCM). A diode-rectified flyback prevents the transformer secondary current from flowing backwards; however, this is not true in the case of SR. In CCM, the secondary rectifier current decays to zero at a very high di/dt once the primary MOSFET turns on. If the SR MOSFET does not turn off immediately, both MOSFETs are on simultaneously causing shoot-through conditions with high stresses. With V_DS sense control, the propagation delay of the V_t1 threshold comparator results in a longer MOSFET conduction time that could eventually result in damaging either or both of the MOSFETs in the converter. The energy stored in the transformer leakage inductance during shoot-through results in voltage overstress for the SR MOSFET, as shown in Figure 3. To ensure robust performance in CCM, the SR MOSFET must turn off just before the primary MOSFET turns on – but this presents an additional cost burden since signal transfer is required from the isolated primary.

Figure 3: SR cross-conduction in CCM mode with V_DS sense control

Designers will also need to address the challenges associated with SR controller bias and standby power impact. Limited supply-voltage-range SR controllers may not allow direct bias from the converter output, thus requiring an auxiliary winding on the transformer and/or a low-dropout regulator (LDO). A high-quiescent-current SR controller will have a significant impact on overall standby power consumption. For example, a 1-mA quiescent-current SR controller biased from the output in a 19-V EPS would alone result in 30- to 35-mW standby power consumption.

Volt-second balance SR control

Now let us discuss how a controller such as the UCC24630 [2, 3] can help overcome the challenges described earlier. This controller is based on the principle of volt-second (V-sec) balance, where the inductor average voltage is zero during a switching period in steady state such that the charge voltage and charge time product are equal to the discharge voltage and discharge time product. The IC operates independently of the MOSFET R_DSON, providing flexibility in MOSFET selection and enabling designers to use larger MOSFETs for reducing rectifier conduction losses. Figure 4 shows typical waveforms with the controller, enabling MOSFET conduction for the full switching cycle until the rectifier current reaches zero. With minimal body-diode conduction, designers can eliminate the parallel Schottky diode.

Figure 4: V-sec control enabling minimal body-diode conduction in discontinuous conduction mode (DCM) (yellow: SR current; blue: SR V_DS; green: SR gate)

For robust converter operation in CCM with fixed-frequency pulse-width modulation (PWM) controllers, the UCC24630 incorporates a CCM dead-time protection function to ensure that the SR MOSFET turns off before the primary MOSFET turns on. This protection function limits the total duration of the primary switch and secondary rectifier’s on time to the previous switching cycle minus the dead time, which is set at 600 ns. Limiting the SR MOSFET’s on time in the current switching cycle prevents cross-conduction in CCM without any communication from the primary. Figure 5 shows waveforms for a 65-KHz CCM converter and how cross-conduction is eliminated with dead-time control.

Figure 5: Operation in CCM mode with dead-time control (pink, primary MOSFET V_DS; blue, SR V_DS; yellow, SR current; green, SR gate)

The controller is housed in a compact SOT23-6 package and powered with a 4- to 28-V supply voltage; hence, the converter output in either 5-V USB chargers or 5- to 20-V USB Type-C Power Delivery adapters can directly bias the controller. The controller also has an automatic standby detect feature, by which its current consumption reduces to 110 µA for minimal standby-power impact.

Summary

With new EPS regulations on the horizon, power-supply designers are exploring every possible option to increase the average efficiency of their designs: power-stage redesign, power-supply architecture changes, green-mode controllers, etc. Replacing the secondary diode with an SR MOSFET is a worthy option, with possibly the best return on investment.

The UCC24630 V-sec controller addresses the key limitations with VDS sensing and enables designers to implement high-performance SR. The controller also delivers robust performance in CCM without any additional circuit(s) for primary-side synchronization.

References

1) Department of Energy Level VI standard for External Power Supplies, Regulations.Gov., April 11, 2014

2) Download the UCC24630 data sheet

3) UCC24630 65W AC/DC adapter, TI reference design