European tech in Intel’s RISC-V Pathfinder dev kit
Intel has used significant amounts of European technology in its Pathfinder RISC-V development kit that will be available free to some users.
The kit allows for a variety of RISC-V cores and other IP to be instantiated on an FPGA board (such as Intel’s Stratix 10 board, above) as well as on simulator platforms, with the ability to run operating systems and tool chains within a unified IDE. This saves time in assembling and testing different IP combinations in a single environment and is a key element in Intel’s move to building a broad set of foundry services.
The development kit brings together UK developed verification tools from Imperas, security blocks from Crypto Quantique and tools from Codeplay Software with configurable and safety-optimised RISC-V cores from Codasip and Fraunhofer IMS in Germany and the PULP RISC-V core via the OpenHW Group, as well as sensors from STMicroelectronics.
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Intel Pathfinder is initially available in two versions, the Starter Edition and the Professional Edition. The Starter Edition is intended for the hobbyist, academia and research community and is available as a free download. The Professional Edition comes with broad ecosystem support, and targets organizations involved in commercial RISC-V based silicon and software. This edition will be made available based on customer needs and underlying product capabilities but includes the free use of some RISC-V cores.
“The Incubation & Disruptive Innovation (IDI) Group at Intel has the charter to identify and grow new business opportunities. The launch of the Intel Pathfinder for RISC-V illustrates our continued commitment to bring these opportunities to life,” said Sundari Mitra, Chief Incubation Officer, Corporate Vice President, and General Manager, IDI.
“Intel Pathfinder for RISC-V represents our ongoing commitment to accelerate the adoption of RISC-V and catalyze the ecosystem around an open-source and standards-based vision,” said Vijay Krishnan, General Manager, RISC-V Ventures from Intel.
“Codeplay has been at the forefront of open standards-based software and this solution with Intel embraces a software-first development approach for customers to design processors to execute efficiently on real application software,” said Andrew Richards, CEO of Codeplay Software
“We’re excited to be a strategic security offering for the launch of Intel® Pathfinder for RISC-V,” said Shahram Mossayebi, CEO and Founder, Crypto Quantique. “Our focus is silicon to cloud security, and our value is in reducing supply chain security risks and complexities, while also lowering the cost of implementing secure silicon designs. Working with Intel® Pathfinder, we see a huge potential to accelerate the democratization of security and compute.
“The AIRISC family of cores from Fraunhofer IMS in Duisburg targets embedded AI applications in key segments like medical wearables, condition monitoring sensors and LIDAR image processing, says Alexander Stanitzki, Business Unit Head, Fraunhofer IMS. “AIRISC provides safety support up to ASIL-D and has been integrated with popular AI frameworks. We are proud to support Intel Pathfinder for RISC-V with a FPGA- and silicon-proven design.”
“The Intel Pathfinder for RISC-V Professional Edition enables SOC architects and system software developers to explore the full potential of the new design freedoms offered by RISC-V,” said Simon Davidmann, CEO at Imperas Software Ltd. “The Imperas fixed platform kit as part of Intel® Pathfinder includes a reference model for RISC-V configured to provide the simulation environment that supports bare metal or applications with operating systems (Linux or RTOS) as a starting point for innovation with next generation domain specific devices.”
“The OpenHW Group is thrilled to see the launch of the Intel Pathfinder for RISC-V development suite supporting the CVE4 32-bit embedded class core based OpenHW CORE-V MCU, and the CVA6 64bit application class core,” said Rick O’Connor, OpenHW Group, President & CEO.
“Pathfinder for RISC-V gives developers another entry to fast application development and prototyping,” said Simone Ferri, MEMS Sub-Group General Manager of marketing, STMicroelectronics Analog, MEMS and Sensors Group. “ST’s ultra-low-power LSM6DSOX inertial module with machine-learning core (MLC), finite state machine (FSM), and advanced digital functions available in Github-hosted model zoos for the MLC and FSM, offers a powerful good starting point to developers of battery-operated IoT, gaming, wearable, and personal-electronics applications.”
As well as the Imperas verification tools, the dev kit makes use of software tools from Siemens EDA, SoC.One and IOTech Systems with RISC-V cores from Andes Technology, SiFive and MIPS alongside Tensilica configurable processors and AI accelerators from Cadence Design Systems and the Rocket Core 64bit processor from the Chips Alliance.
“Having successfully ported Andes’ highly demanded 512-bit vector processor core NX27V and 64-bit superscalar multicore AX45MP to the Intel Stratix 10 GX FPGA board, SoC designers now have the ideal platform equipped with high-performance RISC-V compute and control processors for developing and prototyping complex AI SoCs,” said Frankwell Lin, Chairman and CEO of Andes Technology.
Other security software is available through Check Point Software Technologies and its Quantum IoT Protect Nano Agent to identify and prevent sophisticated attacks in real-time, including top protection against zero-day vulnerabilities.
“We’re really excited to be able to announce our support for the Intel® Pathfinder for RISC-V platform,” said Keith Steele, CEO, IOTech Systems. “The flexibility and choice the product brings to the RISC-V community in combination with IOTech’s edge software provides a great solution that can be used as the basis for a new generation of embedded industrial applications.”
Access the free download for the Pathfinder RISC-V development kit.
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