EUV lithography architecture slashes power
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A researcher in Japan in proposing an architecture that dramatically reduces the complexity and power consumption of an extreme ultraviolet (EUV) lithography system.
The two-mirror projector with a simplified illumination system could slash the power consumption by a factor of 10 compared to current six-mirror EUV projector system says Prof Tsumoru Shintake at the Okinawa Institute of Science and Technology (OIST).
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Power is regarded as the next key challenge for EUV systems. This architecture requires an EUV illumination power is 20W for a process speed of 100 wafers per hour, reducing the total power consumption of the system to less than 100kW. This compares to conventional technologies that often require upwards of 1MW (1,000kW) to run.
“This configuration is unimaginably simple, given that conventional projectors require at least six reflective mirrors. This was made possible by carefully rethinking the aberration correction theory of optics,” said Prof. Shintake. “The performance has been verified using the OpTaliX optical simulation software and it is guaranteed to be sufficient for the production of advanced semiconductors.”
The architecture supports a 0.2 numerical aperture (NA) with a 20 mm field and 0.3 NA with a 10 mm field, rather than the 0.55 NA used for leading edge high-NA systems. This allows the EUV projector to be assembled in a cylindrical tube configuration similar to a DUV projector, providing superior mechanical stability and easier assembly/maintenance.
The EUV light is introduced in front of the mask through two narrow cylindrical mirrors located on both side of the diffraction cone, providing average normal illumination and reducing the mask 3D effect.
The second involves a new method to efficiently direct EUV light onto logic patterns on a flat mirror (the photomask) without blocking the optical path. The theoretical resolution limit is 24 nm with the 20 mm field, and a curved surface mask, the tool height can be reduced to (OID) 1500 mm, which provides resolution of 16 nm. This supports chip designs at 7nm and below.
The EUV lithography architecture is being patented by OIST and will be suitable for small die size chip production for mobile applications as well as the latest chiplet technology says Shintake.
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