Exploration platform for RISC-V CHERI designs
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European RISC-V core developer Codasip has developed an FGPA-based ‘exploration platform’ based on its X730 core that integrates the CHERI (Capability Hardware Enhanced RISC Instructions) secure memory technology.
The Codasip Prime platform enables advanced development of the CHERI memory-safe hardware and secure software using commercially available IP. This allows hardware and software engineers to evaluate and demonstrate the capabilities of the technology, develop and run the software, and integrate the hardware easily into wider test systems.
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Security is rapidly growing in importance to businesses due to recent legislation such as the EU Cyber Resilience Act. Memory safety vulnerabilities are used in up to 87% of cyberattack chains
Codasip sees CHERI as the most cost-effective way to protect against memory safety vulnerabilities. It is backwards compatible and allows migration to safer code via a re-compilation, and it makes C/C++ memory safe, avoiding costly software re-writes, but does require new hardware.
The X730 64bit core is implemented on an FPGA alongside the specific IP for tag management for DDR memory, peripherals and security IP for secure boot and secure debug such as a True Random Number Generator and Test Access Port Protection Unit and a debug probe.
Alongside the QEMU FPGA virtual platform, the Software Development Kit includes CHERI Linux, a C/C++ tool chain including compiler and debugger and secure boot.
“Our new platform is a game changer for consumer, automotive and defence companies alike looking at adopting CHERI,” said Jamie Broome, chief product officer. “Codasip Prime allows software developers to develop and evaluate their applications before chips are built. In addition to hardware IP and software, we offer engineering support from our CHERI experts. Through our engagement with the CHERI Alliance and RISC-V International, we ensure that alignment with industry standards is maintained, enabling early adopters to trust that their integrations are future proof.”
Codasip is standardizing a CHERI extension for RISC-V in collaboration with other members of the CHERI Alliance. The X730 is the first commercial implementation of the CHERI-RISC-V extension and is immediately available.
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