Express boundary-scan controller support test clock speeds of up to 40MHz
The new boundary-scan controller was developed to satisfy the burgeoning requirements for high-speed In-System Programming (ISP) of flash memories, serial memories and CPLDs as well as complex digital circuit testing. The DataBlaster JT 37×7/PXIe offers users sustained test clock speeds of up to 40MHz by use of JTAG Technologies’ proprietary ETT (Enhanced Throughput Technology) system and features an on-board flash image buffer memory.
Supplied with the complementary QuadPOD system, the DataBlaster/PXIe offers four synchronised TAPs (Test Access Ports) able to support multi-TAP test targets (UUTs) or gang programming of four single TAP targets. QuadPOD can also house the full range of JTAG Technologies’ SCIL modules, allowing the user to deploy custom test interfaces (BDM, I2C etc..) or the mixed-signal DAF (Digital, Analog Frequency) measurement module.
The scalable DataBlaster JT 37×7/PXIe range starts with the low-cost entry model JT 3707/PXIe, suitable for high-speed test applications and in-system PLD programming. Companion models JT 3717/PXIe and JT 3727/PXIe, optionally fitted with an ETT module for flash ISP, support high-throughput flash programming as well as test and PLD programming.
DataBlaster/PXIe units are fully compatible with all revisions of JTAG Technologies’ test and ISP tools, such as JTAG ProVision and the former ‘Classic’ family of development and factory run-time packages.
Visit JTAG Technologies at www.jtag.com
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